JPS62136052A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS62136052A
JPS62136052A JP27606885A JP27606885A JPS62136052A JP S62136052 A JPS62136052 A JP S62136052A JP 27606885 A JP27606885 A JP 27606885A JP 27606885 A JP27606885 A JP 27606885A JP S62136052 A JPS62136052 A JP S62136052A
Authority
JP
Japan
Prior art keywords
chip
resin
window member
window material
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27606885A
Other languages
Japanese (ja)
Inventor
Hiroyuki Kitasako
北迫 弘幸
Tsuyoshi Aoki
強 青木
Takaharu Odou
尾堂 隆治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP27606885A priority Critical patent/JPS62136052A/en
Publication of JPS62136052A publication Critical patent/JPS62136052A/en
Pending legal-status Critical Current

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To contrive to be low in cost to improve damp-proof property, by sealing an IC chip with resin and installing a window member above the IC chip to coat the side part of the window member with an adhesive. CONSTITUTION:Above an IC chip 11 formed of ROM die-mounted on a stage 12 of a lead frame, a window member 17, having the nearly same sectional area as the area of the IC chip, is installed. The window member 17 is made of a transmitting material such as ceramics. Side planes except upper and lower surfaces of the window material 17 are coated with an adhesive 18, such as polyimide, superior in adhesiveness, in order to improve adhesiveness between sealing resin 16 and the window member 17. A transmitting thin film 15 for protecting the IC chip 11, when resinous sealing being performed, is formed of silicone resin on the surface of the IC chip 11. Thus, a large decrease in cost is available, and the package sealed with resin becomes superior in damp- proof property.

Description

【発明の詳細な説明】 〔概要〕 窓材の側面部に密着性に優れた樹脂材をコーティング(
被覆)シ耐湿性を向上させたことを特徴とするプラスチ
ックEr’ROMである。
[Detailed Description of the Invention] [Summary] A resin material with excellent adhesion is coated on the side surface of a window material (
This is a plastic Er'ROM characterized by improved moisture resistance.

〔産業上の利用分野〕[Industrial application field]

本発明は半導体装置に関するもので、更に詳しく言えば
、従来のセラミックEPROM  (消去・書込み可能
な読出し専用メモリ)に代り、EFROMを樹脂封止す
るが、ROMの上方に紫外線を通す窓材を配置し、この
窓材の側面部に密着性従って耐湿性に優れた樹脂材をコ
ーティングした構造のEFROMパッケージに関するも
のである。
The present invention relates to a semiconductor device, and more specifically, instead of a conventional ceramic EPROM (erasable/writable read-only memory), an EFROM is sealed with resin, and a window material that allows ultraviolet rays to pass is placed above the ROM. The present invention relates to an EFROM package having a structure in which the side surface of the window material is coated with a resin material having excellent adhesiveness and moisture resistance.

〔従来の技術〕[Conventional technology]

第4図の断面図に示されるセラミック形EFROMパッ
ケージは知られたものであり、同図において、31は1
70Mが形成されたICチップ、32はセラミック本体
、33はセラミック製のキャップ、34はキャンプ33
に設けたガラス窓、35はガラスシール、36はメタラ
イズ層、37はリードを示し、ICCランプ1にガラス
窓34を通して光38を照射しIC千ツブ31に形成さ
れたメモリを消去し、かつ、書込みをなす。
The ceramic type EFROM package shown in the cross-sectional view of FIG. 4 is known, and in the same figure, 31 is 1
70M is formed IC chip, 32 is ceramic body, 33 is ceramic cap, 34 is camp 33
35 is a glass seal, 36 is a metallized layer, and 37 is a lead, the ICC lamp 1 is irradiated with light 38 through the glass window 34 to erase the memory formed in the IC tube 31, and Make a note.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

セラミック本体32はセラミックのグリーンシートを積
層し焼結して形成するものであり、工程数が多くコスト
が著しく高くなる問題がある。
The ceramic body 32 is formed by laminating and sintering ceramic green sheets, which has the problem of requiring a large number of steps and significantly increasing costs.

そこでEFROMのパッケージを樹脂封止によって形成
することが提案され、第5図の断面図に示される構造の
ものが提案された。なお第5図において、41はROM
が形成されたICチップ、42は封止樹脂例えばエポキ
シレジン、43はセラミック窓材、44はリードを示し
、セラミック窓材43を通して光45を照射しROMの
消去・書込みを行う。
Therefore, it was proposed to form an EFROM package by resin sealing, and a structure shown in the cross-sectional view of FIG. 5 was proposed. In addition, in FIG. 5, 41 is a ROM
42 is a sealing resin such as epoxy resin, 43 is a ceramic window material, and 44 is a lead. Light 45 is irradiated through the ceramic window material 43 to erase and write in the ROM.

かかる構造においては、セラミック窓材43と封止樹脂
(例えばエポキシレジン)42の密着性が悪く、かつ、
両者の熱膨張係数が異なるために、セラミック窓材43
とエポキシレジン42の接触面に隙間ができ、そこから
水分、湿気が入ってくる、すなわち耐湿性に劣るという
問題がある。
In such a structure, the adhesion between the ceramic window material 43 and the sealing resin (for example, epoxy resin) 42 is poor, and
The ceramic window material 43 has a different coefficient of thermal expansion.
There is a problem that a gap is formed between the contact surface of the epoxy resin 42 and the epoxy resin 42, and water and moisture enter from the gap, that is, the moisture resistance is poor.

本発明はこのような点に鑑みて創作されたもので、低コ
ストでかつ耐湿性に優れたEFROMを提供することを
目的とする。
The present invention was created in view of these points, and an object of the present invention is to provide an EFROM that is low in cost and has excellent moisture resistance.

〔問題点を解決するための手段〕[Means for solving problems]

第1図は本発明実施例の断面図で、同図において、11
は120Mが形成されたICチップ、12はICチップ
11がグイ付けされたリードフレームのステージ、13
はリード、14はICチップ11の電極とり−ド13と
を接続するワイヤ、15はICチップ11上に塗布され
た例えばシリコーン樹脂の如き紫外線を通す性質(以下
には透光性という)と弾性をもった材料の薄膜、16は
エポキシ樹脂の如き封止用の樹脂、17は例えばアルミ
ナ製の透光性窓材、18は窓材17の図に見て上下の面
を除く側面部にコーティングされた密着性に優れたポリ
イミドの如き接着材である。
FIG. 1 is a sectional view of an embodiment of the present invention, and in the same figure, 11
12 is the IC chip on which 120M is formed, 12 is the stage of the lead frame to which the IC chip 11 is attached, 13
14 is a lead, 14 is a wire connecting the electrode lead 13 of the IC chip 11, and 15 is a material coated on the IC chip 11, such as silicone resin, which has a property of transmitting ultraviolet rays (hereinafter referred to as translucency) and elasticity. 16 is a sealing resin such as epoxy resin, 17 is a transparent window material made of alumina, and 18 is a coating on the side surfaces of the window material 17 except for the upper and lower surfaces as seen in the figure. It is an adhesive material such as polyimide that has excellent adhesion.

第1図の実施例において、ICチップ11が樹脂封止さ
れたEFROMパンケージが提供されるが、ICチップ
11の上部には窓材17が配置され、この窓材17の側
面部には接着材18がコーティングされている。
In the embodiment shown in FIG. 1, an EFROM pancase in which an IC chip 11 is sealed with resin is provided. 18 is coated.

〔作用〕[Effect]

上記した構造のEFROMパッケージにおいて、窓材1
7は接着材18によってエポキシ樹脂16に密着性良く
接着されているので、両者の接触面を通して外部の水分
、湿気がパッケージ内に入ることが防止され、またRO
Mの消去・書込みのための光は透光性の窓材17、透光
性薄膜15を通ってICチップ11に照射されるもので
ある。
In the EFROM package having the above structure, the window material 1
7 is bonded to the epoxy resin 16 with adhesive 18 with good adhesion, so that external water and moisture are prevented from entering the package through the contact surface between the two, and RO
Light for erasing and writing M is irradiated onto the IC chip 11 through the transparent window material 17 and the transparent thin film 15.

〔実施例〕〔Example〕

以下、図面を参照して本発明の実施例を詳細に説明する
Embodiments of the present invention will be described in detail below with reference to the drawings.

薄び第1図を参照すると、リードフレームのステージ1
2にグイ付けされたROMを形成したICチップ11は
例えばエポキシ樹脂16で樹脂封止されるのであるが、
ICチップを完全に樹脂封止する型の従来のプラスチッ
クタイプのパッケージとは異なりICチップ11の上方
にはICチップの面積とほぼ同じ大きさの断面積をもっ
た窓材17が配置される。窓材17はセラミックの如き
透光性材料で作る。そして、封止樹脂16と窓材17と
の密着性を良くするために、すなわち両者の接触面から
外部の水分や湿気が侵入することを防止するために、窓
材17の図に見て上下の面を除(側面部に、密着性の良
い接着材18例えばポリイミドをコーティングする。な
お窓材17、接着材18の材料は上記のものに限定され
るものではない。
Thinning Referring to Figure 1, stage 1 of the lead frame
The IC chip 11 with the ROM formed thereon is sealed with, for example, an epoxy resin 16.
Unlike the conventional plastic type package in which the IC chip is completely sealed with resin, a window material 17 having a cross-sectional area approximately the same size as the area of the IC chip is arranged above the IC chip 11. The window material 17 is made of a translucent material such as ceramic. In order to improve the adhesion between the sealing resin 16 and the window material 17, that is, to prevent external moisture from entering through the contact surface between the two, the window material 17 is An adhesive material 18 with good adhesion, such as polyimide, is coated on the side surfaces of the window material 17 and the adhesive material 18, but the materials for the window material 17 and the adhesive material 18 are not limited to those mentioned above.

窓材17は第2図の斜視図に示される形状のもので、そ
の側面部に接着材18をコーティングする。
The window material 17 has the shape shown in the perspective view of FIG. 2, and its side surfaces are coated with an adhesive 18.

窓材17は接着材18をコーティングしない面の拡がり
がICチップ11の上面をほぼ覆う寸法に設定する。
The window material 17 is dimensioned so that the extent of the surface not coated with the adhesive 18 almost covers the upper surface of the IC chip 11 .

ICチップ11の表面には、樹脂封止の際にICチップ
11を保護するための透光性薄膜15を例えばシリコー
ン樹脂で形成する。この薄膜15はICチップ11の表
面を完全に覆う如(に塗布する。
A transparent thin film 15 made of, for example, silicone resin is formed on the surface of the IC chip 11 to protect the IC chip 11 during resin sealing. This thin film 15 is applied so as to completely cover the surface of the IC chip 11.

fiIJ3図は透光性薄膜15が塗布された状態を詳細
に示す断面図で、同図でllaはICチップのセル部分
を示す。ワイヤ14は既にICチップの電極に接着され
終っているから、シリコーン樹脂でワイヤの接着部分を
覆ってもなんら支障はない。図示の例でワイヤのボール
状の接着部分14aの高さは50、cam、、ICチッ
プ11の厚さは400〜500μmであり、シリコーン
樹脂の厚さは100〜200μm程度にした。透光性薄
膜15はシリコーン樹脂以外の弾性をもった透光性のゲ
ル状のレジンで形成してもよい。
Fig. fiIJ3 is a cross-sectional view showing in detail the state in which the transparent thin film 15 is coated, and in this figure, lla indicates the cell portion of the IC chip. Since the wire 14 has already been bonded to the electrode of the IC chip, there is no problem in covering the bonded portion of the wire with silicone resin. In the illustrated example, the height of the ball-shaped adhesive portion 14a of the wire is 50 mm, the thickness of the IC chip 11 is 400 to 500 μm, and the thickness of the silicone resin is approximately 100 to 200 μm. The transparent thin film 15 may be formed of an elastic, transparent gel-like resin other than silicone resin.

第1図に示したパンケージは、 ICチップ付け/ワイヤ付は シリコン樹脂塗布 窓付け、キュアして固定する モールド成形 窓付け の工程によって作ることができる。The pan cage shown in Figure 1 is IC chip attachment/wire attachment silicone resin coating Attach window, cure and fix mold forming window installation It can be made by the process of

透光性薄膜は前記したモールド成形においてICチップ
11を保護する機能を果す。そしてモールド・成形にお
いては、通常の金型を用いることが出来る。
The light-transmitting thin film functions to protect the IC chip 11 during the above-described molding. For molding/forming, a normal metal mold can be used.

〔発明の効果〕〔Effect of the invention〕

以上述べてきたように、本発明によれば、EFROMパ
ッケージを従来の高価なセラミックパッケージに代えて
樹脂封止によって形成して、コストを1/20〜1/1
0程度大幅に減少することが可能になり、しかも樹脂封
止したパッケージは優れた耐湿性をもつものである。
As described above, according to the present invention, the EFROM package is formed by resin sealing instead of the conventional expensive ceramic package, and the cost is reduced to 1/20 to 1/1.
In addition, the resin-sealed package has excellent moisture resistance.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明実施例の断面図、 第2図は第1図の装置の窓材の斜視図、第3図は第1図
の装置の一部を詳細に示す断面図、 第4図は従来例の断面図、 第5図は他の従来例の断面図である。 第1図ないし第3図において、 11はICチップ、 11aは(Cチップのセル部分、 12はリードフレームのステージ、 13はリード、 14はワイヤ、 14aはワイヤの接着部分、 15は透光性薄膜、 16はエポキシ樹脂(封止樹脂)、 16aは内壁、 17は窓材、 18は接着材、 21aは下型、 21bは上型、 22はリードフレーム、 23は上型の突起部である。 代理人  弁理士  久木元   彰 復代理人 弁理士  大 菅 義 之 本発明欠党利町面聞 第1図 ヤ1圓め簿府の薪筏圓 第2図 +1t!]め狼1の一部の硝−四釘面図第3図 後者9J釘耐図 従東例#r面囚 第5図
FIG. 1 is a cross-sectional view of an embodiment of the present invention, FIG. 2 is a perspective view of the window material of the device shown in FIG. 1, FIG. 3 is a cross-sectional view showing a part of the device shown in FIG. 1 in detail, and FIG. is a sectional view of a conventional example, and FIG. 5 is a sectional view of another conventional example. In Figures 1 to 3, 11 is an IC chip, 11a is a cell part of a C chip, 12 is a stage of a lead frame, 13 is a lead, 14 is a wire, 14a is an adhesive part of the wire, 15 is a translucent part 16 is an epoxy resin (sealing resin), 16a is an inner wall, 17 is a window material, 18 is an adhesive, 21a is a lower mold, 21b is an upper mold, 22 is a lead frame, 23 is a protrusion of the upper mold .Representative Patent attorney: Hajime Kuki Agent: Patent attorney Yoshiyoshi Osuga Figure 3 of the latter 9J nail resistance diagram of the former example #r surface Figure 5

Claims (1)

【特許請求の範囲】 消去・書込み可能な読出し専用メモリが形成されたIC
チップ(11)を樹脂封止してなるプラスチックタイプ
パッケージにして、 ICチップ(11)の表面には紫外線透過性の弾性ある
薄膜(15)が設けられ、 ICチップ(11)の上方にはそれの面積とほぼ同じ面
積をもった窓材(17)が配置され、 窓材(17)の側面部には密着性ある接着材(18)が
コーティングされてなることを特徴とする半導体装置。
[Claims] An IC in which an erasable/writable read-only memory is formed.
The chip (11) is sealed with a resin into a plastic type package, and the surface of the IC chip (11) is provided with an elastic thin film (15) that transmits ultraviolet rays, and above the IC chip (11) is provided with an elastic thin film (15). A semiconductor device characterized in that a window material (17) having approximately the same area as the area of the window material (17) is arranged, and the side surface of the window material (17) is coated with an adhesive material (18) having adhesive properties.
JP27606885A 1985-12-10 1985-12-10 Semiconductor device Pending JPS62136052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27606885A JPS62136052A (en) 1985-12-10 1985-12-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27606885A JPS62136052A (en) 1985-12-10 1985-12-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS62136052A true JPS62136052A (en) 1987-06-19

Family

ID=17564354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27606885A Pending JPS62136052A (en) 1985-12-10 1985-12-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS62136052A (en)

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