JPS62133742A - Package - Google Patents

Package

Info

Publication number
JPS62133742A
JPS62133742A JP27336985A JP27336985A JPS62133742A JP S62133742 A JPS62133742 A JP S62133742A JP 27336985 A JP27336985 A JP 27336985A JP 27336985 A JP27336985 A JP 27336985A JP S62133742 A JPS62133742 A JP S62133742A
Authority
JP
Japan
Prior art keywords
leads
electronic component
region
wiring board
silicone resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27336985A
Other languages
Japanese (ja)
Other versions
JPH0516667B2 (en
Inventor
Yukio Yamaguchi
幸雄 山口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP27336985A priority Critical patent/JPS62133742A/en
Priority to US06/900,532 priority patent/US4709301A/en
Priority to DE86112244T priority patent/DE3688164T2/en
Priority to EP86112244A priority patent/EP0214621B1/en
Publication of JPS62133742A publication Critical patent/JPS62133742A/en
Publication of JPH0516667B2 publication Critical patent/JPH0516667B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15182—Fan-in arrangement of the internal vias
    • H01L2924/15184—Fan-in arrangement of the internal vias in different layers of the multilayer substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent the leads of electronic parts from being cut off or peeled off from an interconnecting substrate without fail by a method wherein the regions encircled by the electronic parts and leads on the interconnecting substrate are filled with non-hardening ultraviolet ray hardening type Si region. CONSTITUTION:Electronic parts 4 are bond-arranged face down on spacers 9 to electrically connect the leads 5 of electronic parts 4 to the pads 8 for leads 5 on an interconnecting substrate 3. Within a frame body 10, the parts on the backside of said parts 4 and leads 5 are formed of a first ultraviolet ray hardening type Si region 11 becoming non-hardened or semihardened state while the parts on the upper side of leads 5 are formed of a second Si region 12 hardened into elastic gel state. To replace the electronic parts 4 etc. with new ones, firstly, the region 12 is peeled off and then the region 11 is immersed in an organic solvent to be solved and removed easily.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子装置等に使用されるパッケージに係わシ、
特に信号等を授受する入出力ビンを配線基板に設は電子
部品を実装してシリコンコーティングされたパッケージ
に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a package used for an electronic device, etc.
In particular, it relates to a package in which input/output bins for transmitting and receiving signals, etc. are provided on a wiring board, electronic components are mounted, and the package is coated with silicon.

〔従来の技術〕[Conventional technology]

従来、この種のパッケージは、第２図に示すように内部
に複数層の導体配線層１を有し裏面に入出力ピン２が設
けられた配線基板３上に電子部品４が実装され、リード
５を介して前記導体配線層１に接続されて電子部品４０
周辺部はシリコン樹脂６によシ被榎されている。（例え
ば、ＢｒａｄＯｌｄｅｒ　ａｎｄ　Ｒｉｃｈａｒｄ　Ａ
、、　”Ｎｏｎ−ｈｅｒｍｅｔｉｃｐａｃｋａｇｉｎｇ
　ｔｅｃｈｎｉｑｕｅｓ　ｆｏｒ　ｈｙｂｒｉｄｓ”。Conventionally, as shown in FIG. 2, in this type of package, electronic components 4 are mounted on a wiring board 3 that has a plurality of conductor wiring layers 1 inside and has input/output pins 2 on the back side. The electronic component 40 is connected to the conductor wiring layer 1 via the
The peripheral portion is covered with silicone resin 6. (For example, Brad Older and Richard A.
,, ”Non-hermetic packaging
techniques for hybrids”.

Ｅｌｅｃｔｒｏｎｉｃ　Ｐａｃｋａｇｌｎｇ　ａｎｄ　
Ｐｒｏｄｕｃｔｉｏｎ　。Electronic Packaging and
Production.

Ｊｕｎｅ　、１９）９．Ｐ１３７〜１３９）。June, 19)9. P137-139).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のパッケージでは、電子部品４の交換時に
、リード５と電子部品４と配線基板３とで囲まれた領域
に充填されたシリコン樹脂６の除去が困難であシ、特に
リード５が微細化したり、電子部品４がフェイスダウン
実装となると、り一ド５と電子部品４と配線基板３とで
囲まれた領域が狭くなシ、シリコン樹脂６が除去できず
、またシリコン樹脂を溶解させる有機溶剤への浸漬時に
シリコン樹脂８の膨張でリード５が切断されたシ、配線
基板１からリード５が剥れたシするなどの問題があった
。In the conventional package described above, when replacing the electronic component 4, it is difficult to remove the silicone resin 6 filled in the area surrounded by the lead 5, the electronic component 4, and the wiring board 3. When the electronic component 4 is mounted face-down, the area surrounded by the adhesive 5, the electronic component 4, and the wiring board 3 is narrow, and the silicone resin 6 cannot be removed, and the silicone resin may be dissolved. There were problems such as the leads 5 being cut due to expansion of the silicone resin 8 during immersion in an organic solvent, and the leads 5 peeling off from the wiring board 1.

〔問題点を解決するだめの手段〕[Failure to solve the problem]

本発明によるパッケージは１、配線基板上に実装された
電子部品とこの電子部品のリードとで囲まれた領域に紫
外線照射によシ未硬化ないし半硬化する第１の紫外線硬
化形シリコン樹脂を充填し、この第１の紫外線硬化形シ
リコン樹脂上に弾性力のあるゲル状に硬化する第２の紫
外線硬化形シリコン樹脂を充填するものである。In the package according to the present invention, 1. an area surrounded by an electronic component mounted on a wiring board and the leads of this electronic component is filled with a first UV-curable silicone resin that is uncured or semi-cured by UV irradiation; The first ultraviolet curable silicone resin is then filled with a second ultraviolet curable silicone resin that hardens into an elastic gel-like state.

〔作用〕[Effect]

第１のシリコン樹脂が硬化されていないので、有機溶剤
に溶解される。Since the first silicone resin is not cured, it is dissolved in the organic solvent.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第１図は本発明の一実施例を示す縦断面図であり、前述
の図と同一部分には同一符号を付しである。同図におい
て、配線基板１の表面にはリード用パッド８が、その裏
面には入出力ピン２がそれぞれ設けられておシ、このリ
ード用パッド８と入出力ピン２とは配線基板３内で導体
配線層１によシミ気的に接続されている。才た、この配
線基板１上には図示しないが例えばエポキシ樹脂などの
接着剤によシスペーサ９が固定配置され、さらにこのス
ペーサ９上には電子部品４がフェースダウンで接着配置
され、電子部品４のリード５が配線基板３上のリード用
パッド８に電気的に接続されている。また、この配線基
板３上にはその周辺部に枠体１０が図示しないが接着剤
によシ取付固定されている。そして、この枠体１０内に
は紫外線硬化形のシリコン樹脂が充填され、上方側から
紫外線を照射することによシ、電子部品４および電子部
品４のリード５の影になる部分が未硬化ないしは半硬化
状態となる第１のシリコン樹脂１１が形成され、その周
辺部および上部には弾力性のあるゲル状に硬化する第２
のシリコン樹脂１２が形成されている。また、枠体１０
の開口部には電子部品４と図示しない熱伝導性コンパウ
ンドで接触してキャップ１３が図示しないが接着剤によ
シ取付固定されている。このキャップ１３は、ヒートシ
ンク等の放熱部品を接着、半田付けまたは熱伝導性コン
パウンドによる接続等によシ、電子部品４で発生する熱
を外部に導く機能を有しておシ、空冷するためのヒート
シンクまたは水冷するための冷却板と一体化しても良い
。また、スペーサ９は、絶縁性であれば配線基板３と電
子部品４との接着剤も絶縁性であることが望ましいが、
電子部品４のスペーサ９との接する面か絶縁されていた
）、配線基板３のスペーサ９との接する面が絶縁されて
いれば、スペーサ９および接着剤は導電性でも良い。ま
た、配線基板３の枠体１０との接する部分が絶縁されて
いれば、枠体１０および接着剤は導電性でも良い。さら
に配線基板３の枠体１０と接する部分が絶縁され、かつ
その上に専用の金属層を設ければ、金属の場合の枠体１
０と配線基板３とを半田付けできる。FIG. 1 is a longitudinal sectional view showing one embodiment of the present invention, and the same parts as in the previous figures are given the same reference numerals. In the figure, a lead pad 8 is provided on the front surface of the wiring board 1, and an input/output pin 2 is provided on the back surface thereof. It is electrically connected to the conductor wiring layer 1. Although not shown, a spacer 9 is fixedly arranged on the wiring board 1 using an adhesive such as epoxy resin, and furthermore, an electronic component 4 is adhesively arranged face-down on the spacer 9. Leads 5 are electrically connected to lead pads 8 on the wiring board 3. Further, a frame 10 is attached and fixed to the peripheral portion of the wiring board 3 using an adhesive (not shown). The frame 10 is filled with an ultraviolet curable silicone resin, and by irradiating ultraviolet rays from above, the electronic component 4 and the portions of the electronic component 4 that are in the shadow of the leads 5 are uncured or A first silicone resin 11 that is in a semi-hardened state is formed, and a second silicone resin that hardens into an elastic gel-like state is formed around and above it.
A silicone resin 12 is formed. In addition, the frame body 10
A cap 13 is attached and fixed to the opening by an adhesive (not shown) in contact with the electronic component 4 using a thermally conductive compound (not shown). This cap 13 has the function of guiding heat generated in the electronic component 4 to the outside by bonding, soldering, or connecting a heat sink or other heat dissipating component with a thermally conductive compound. It may be integrated with a heat sink or a cooling plate for water cooling. Further, if the spacer 9 is insulating, it is desirable that the adhesive between the wiring board 3 and the electronic component 4 is also insulating.
The spacer 9 and the adhesive may be conductive as long as the surface of the electronic component 4 in contact with the spacer 9 is insulated) and the surface of the wiring board 3 in contact with the spacer 9 is insulated. Furthermore, the frame 10 and the adhesive may be conductive as long as the portion of the wiring board 3 that contacts the frame 10 is insulated. Furthermore, if the portion of the wiring board 3 in contact with the frame 10 is insulated and a dedicated metal layer is provided thereon, the frame 10 can be made of metal.
0 and the wiring board 3 can be soldered.

このような構成によれば、電子部品４等を交換する場合
、まず第２のシリコン樹脂１２を剥がし、次に第１のシ
リコン樹脂１１を有機溶剤に浸漬する゛ことによシ、溶
解され、容易に除去することができる。According to such a configuration, when replacing the electronic component 4, etc., the second silicone resin 12 is first peeled off, and then the first silicone resin 11 is immersed in an organic solvent to be dissolved. Can be easily removed.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、配線基板上に実装
された電子部品とこの電子部品のリードとで囲まれた領
域に硬化しない第１の紫外線硬化形シリコン樹脂を充填
したことによシ、電子部品の交換時に電子部品のリード
の外側の第２の紫外線硬化形シリコン樹脂のみを剥離し
、第１のシリコン樹脂を有機溶剤に浸漬することによシ
、溶解され、容易に除去されるので、電子部品のリード
の切断および配線基板からの剥れ等を確実に防止するこ
とができるという極めて優れた効果が得られる。As explained above, according to the present invention, the area surrounded by the electronic component mounted on the wiring board and the lead of the electronic component is filled with the first ultraviolet curable silicone resin that does not harden. When replacing the electronic component, only the second ultraviolet curable silicone resin on the outside of the lead of the electronic component is peeled off, and the first silicone resin is immersed in an organic solvent to be dissolved and easily removed. Therefore, an extremely excellent effect can be obtained in that it is possible to reliably prevent the leads of the electronic component from being cut and from being peeled off from the wiring board.

【図面の簡単な説明】 第１図は本発明によるパッケージの一実施例を示す縦断
面図、第２図は従来のノくツケージを示す縦断面図であ
る。 １・・・・導体配線層、２・・・・入出力ピン、３争・
・・配線基板、４・・・・電子部品、５・・争・　リー
ド、８拳・　・・リード用ノくラド、９・・・・スペー
サ、１０・・・・枠体、１１・・・・第１のシリコン樹
脂、１２・・・・第２のシリコン樹脂、１３・・・・キ
ャップ。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a longitudinal sectional view showing an embodiment of a package according to the present invention, and FIG. 2 is a longitudinal sectional view showing a conventional shoe cage. 1... Conductor wiring layer, 2... Input/output pin, 3...
・・Wiring board, 4・・Electronic parts, 5・・Lead, 8 fists・・・Nokurado for lead, 9・・Spacer, 10・・Frame, 11・・・- First silicone resin, 12...second silicone resin, 13...cap.

Claims (1)

【特許請求の範囲】[Claims] リードを有する電子部品を実装した配線基板と、前記配
線基板上に取付固定された枠体と、前記電子部品と電子
部品のリードと配線基板とで囲まれる領域に充填された
硬化しない第１の紫外線硬化形シリコン樹脂と、前記電
子部品の周辺部および上部に充填された弾力性のあるゲ
ル状に硬化する第２の紫外線硬化形シリコン樹脂とを具
備することを特徴としたパッケージ。a wiring board on which an electronic component having a lead is mounted; a frame mounted and fixed on the wiring board; and a first non-hardening agent filled in an area surrounded by the electronic component, the leads of the electronic component, and the wiring board. A package comprising: an ultraviolet curable silicone resin; and a second ultraviolet curable silicone resin that cures into an elastic gel-like form and is filled in the periphery and upper part of the electronic component.
JP27336985A 1985-09-05 1985-12-06 Package Granted JPS62133742A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP27336985A JPS62133742A (en) 1985-12-06 1985-12-06 Package
US06/900,532 US4709301A (en) 1985-09-05 1986-08-26 Package
DE86112244T DE3688164T2 (en) 1985-09-05 1986-09-04 Pack with a substrate and at least one electronic component.
EP86112244A EP0214621B1 (en) 1985-09-05 1986-09-04 A package comprising a substrate and at least one electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27336985A JPS62133742A (en) 1985-12-06 1985-12-06 Package

Publications (2)

Publication Number Publication Date
JPS62133742A true JPS62133742A (en) 1987-06-16
JPH0516667B2 JPH0516667B2 (en) 1993-03-05

Family

ID=17526940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27336985A Granted JPS62133742A (en) 1985-09-05 1985-12-06 Package

Country Status (1)

Country Link
JP (1) JPS62133742A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59171343U (en) * 1983-04-28 1984-11-16 株式会社デンソー Hybrid integrated circuit device
JPS60116151A (en) * 1983-11-28 1985-06-22 Matsushita Electric Works Ltd Sealing method of electronic parts
JPS6120771U (en) * 1984-07-09 1986-02-06 日本フエラス工業株式会社 Installation equipment for sash frame

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59171343U (en) * 1983-04-28 1984-11-16 株式会社デンソー Hybrid integrated circuit device
JPS60116151A (en) * 1983-11-28 1985-06-22 Matsushita Electric Works Ltd Sealing method of electronic parts
JPS6120771U (en) * 1984-07-09 1986-02-06 日本フエラス工業株式会社 Installation equipment for sash frame

Also Published As

Publication number Publication date
JPH0516667B2 (en) 1993-03-05

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