JPS62132415A - Comb-line filter - Google Patents

Abstract

PURPOSE:To lower a noise level generated at a change in a frequency characteristic by generating a designation signal designating a signal delay time changed at a prescribed time interval with a smaller value depending on the difference of the designation time just before and just after the designation time represented by a characteristic control signal changes. CONSTITUTION:An output data of a delay transition time setting circuit 11 is fed to a counter 16, to which a count pulse from a pulse generator is fed at each prescribed time Ts. The counter 16 is constituted in a way that its count changes from 1 until it is equal to a numeral represented by an output data of the delay transition time setting circuit 11 sequentially synchronously with an input signal Si by the count pulse. Noise is generated at an interval of one sample time over the delay transition time DELTAT and the delay time of a variable delay circuit 2 is changed gradually at each 1 sample time. Thus, a correlation always exists between adjacent samples outputted from the variable delay circuit 2 to reduce the noise level.

Description

TECHNICAL FIELD The present invention relates to a comb filter, and more particularly to a comb filter with variable frequency characteristics.

BACKGROUND ART A conventional comb filter with variable frequency characteristics is shown in FIG. In the figure, a digital input signal 3i corresponding to a sample value obtained by sampling an analog signal such as an audio signal every -13Jj is supplied to an adder circuit 1 and a variable delay circuit 2 via an input terminal IN+. There is. In the variable delay circuit 2 43, the input signal S1 is supplied to the serial input terminal of the shift register 3. The shift register 3 is supplied with a shift pulse having the same frequency as the limp ring frequency (1i-S) from a pulse generation circuit (not shown).The parallel output terminals of this register 3 receive one sample of the input signal 3i. Time (=Ts > sequentially i!
! A plurality of signals obtained over time are derived. A plurality of signals derived from the parallel output terminals of the shift register 3 are respectively supplied to a plurality of fixed contacts of the changeover switch 4.

Characteristic control No. 18C is supplied to the control input terminal of the changeover switch 4 via the input terminal IN2. Changeover switch number 4, for example, the one behind the multiple fixed contacts, 1Itll
The movable contact is configured to contact one corresponding to the numerical value represented by the signal supplied to the input terminal. The signal derived from the movable contact of the changeover switch 4 is supplied as the output of the variable delay circuit 2 to the addition circuit 1 and added to the input signal 3i. Then, the output of the 7JIIR circuit 1 is supplied to the output terminal OjJT.

In the above configuration, a signal obtained by delaying the input signal Si by a time round number μ according to the characteristic control signal C is derived from the movable contact of the changeover switch 4, and is output from the variable delay circuit 2. The output of the variable delay circuit 2 and the input signal 3i are connected to the adder circuit 1.
are added to produce output No. 13. These adder circuit 1 and variable delay circuit 2 form a comb filter having frequency characteristics such that passbands and stopbands are alternately present at frequency intervals corresponding to the delay time of variable delay circuit 2.

Hereinafter, in a conventional comb filter such as 1:, the sample values Sin, Si (n
+1),...5i(n+7)....../j input signal Si is sequentially supplied to the input terminal IN every predetermined time l"s. At this time, the characteristic As the control signal C changes with time as shown in FIG. 4(B), the delay time of the variable delay circuit 2 changes as shown in FIG. 4(C).
K+5)'t When the sample time changes to the sample time, the output of the variable delay circuit 2 is at time E1 as shown in the figure.
Previously in J3, the input signal S: becomes a signal delayed by (K + 5 > sample time), and after time t1, signals delayed by 4rK sample times of the input signal Si are sequentially output.

Therefore, there is no correlation between the sunnor values indicated by the signals sequentially output from the variable delay circuit 2 immediately before and after C1 time 1+.
had the disadvantage that a large amount of noise was generated in the output signal.

SUMMARY OF THE INVENTION An object of the present invention is to provide a comb filter capable of reducing the noise level generated when frequency characteristics change.
? It is to offer.

The comb filter according to the present invention has a configuration in which, when the designated time of the characteristic control signal changes, the signal delay signal of the variable delay circuit is changed by a value smaller than the difference between the designated time immediately before and after the change. It becomes.

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 1 and 2.

In FIG. 1, the adder circuit 1 and the variable delay circuit 2 are connected to the third
Connected in the same way as the device shown in the figure. However, in this example, the characteristic control signal C is supplied to the variable delay circuit 2 as a designation signal Ca for designating a signal delay time after passing through a control circuit 5 as a delay time designation means. The characteristic control signal C in the control circuit 5 is sent to the decoding circuit 6.
and is converted into data representing a delay time corresponding to the specified time indicated by the characteristic control signal C. The output of this decoding circuit 6 is supplied to a delay change amount detection circuit 7. The delay change amount detection circuit 7 calculates the delay change amount by calculating the difference between the output data of the delay ω memory 8 that stores the output data of the decoding circuit 6 and the output data of the decoding circuit 6. It is formed by a reduction circuit 9 which is output as data.

The output data of the delay change amount detection circuit 7 is supplied to a delay amount change rate setting circuit 10 and a d delay/u transition time setting circuit 11.

The low change rate setting circuit 10 includes a code detection circuit 12 that generates a code detection signal representing the sign of the delay change data, and a code detection circuit 12 that generates a code detection signal representing the sign of the delay change data. and a delay change rate data generating circuit 13 which outputs the delay change rate data as delay change rate data.The output data of this delay amount change rate setting circuit 10 is R.
It is supplied to a delay transition time setting circuit 11 and a multiplication→circuit 15.

The delay j/mouth transfer time setting circuit 11 is configured to output the data after removing the delay change amount data with the delay change rate data.The output of the delay transition time setting circuit 11 is The counter 16 is supplied with count pulses from a pulse generator (not shown) at predetermined time intervals Ts.The counter 16 uses the count pulses to perform counting in synchronization with the input signal 3i. The counter 16 is configured to sequentially change the value from 1 until it becomes equal to the value indicated by the output data of the time step setting circuit 11.
and is multiplied by the delay rate of change data. The output data of the multiplication circuit 15 is added to the data stored in the d section memory 8 in the addition circuit 17. The output of adder circuit 17 is supplied to encoder circuit 18 . Encoding circuit 1
8 is configured to convert the output data of the adder circuit 17 into a designation signal Ca corresponding to the delay time represented by this output data. The output of the encode circuit 18 is the output of the control circuit 5.

In the above configuration, when the specified time indicated by the characteristic control signal C changes from Kp to K, the delay change amount Δ indicated by the output data of the delay change amount detection circuit 7 is expressed by the following equation.

Δ = ρ−K (1) Here, the rate of change in delay amount, that is, the delay m that changes when 1 ripple time s elapses, is ΔD, and the delay transition time is In other words, the value corresponding to the time at which delay changes occur continuously every sample time is expressed as ΔT and is 1.

Then, the delay change amount Δ is the delay change rate ΔD.

The following relationship holds true between the delay iU and the transition time Δt.

Δ=ΔD×ΔT (2) For these delays, data indicating the rate of change ΔD and the delay transition time ΔK are output from the delay amount change rate setting circuit 1o and the delay transition time setting circuit 11.

Here, the absolute value 1ΔD1 of the rate of change in delay amount is taken as 1. Also, if Kp4rK+5 is taken, then from equation (1), Δ=5
becomes. A delay amount change rate ΔD having the same sign as this delay change amount Δ is set by the delay B (change rate setting circuit 10).

When the delay transition time ΔT is calculated from the paper amount change rate ΔD and the H extension change h1Δ, the counter 16 changes from 1 to Δ
Count up to T in synchronization with the input signal S1. The output Nc of the counter 16 is multiplied by the delay amount change rate ΔD, and the corrected delay change Δ is calculated by '. A correction circuit 17 adds 0 to this ν extension change angle Δ' and the d electric charge Kp before the change stored in the delay ω meter 8, and outputs a corrected delay amount 1<'.

A designated signal ICa corresponding to the corrected delay amount is output from the encoder circuit 18.

Since the C1 value of the counter 16 changes with the same JIQ as the input signal S1, the input signal Si and the characteristic control signal C are
When the delay changes as shown in Figures (Δ) and (B), the delay is synchronized with the input signal 3i after time E' (
It changes sequentially from K-1-5>sample time to K-synthesis time. Therefore, the designated signal Ca changes as shown in FIG. 2(C), and the delay time of the wind circuit 2 changes as shown in FIG.
), after time t1, it changes by one sample time in synchronization with the input signal 3i. As a result, the output of the variable delay circuit 2 is as shown in FIG. 2(E), and the signal led to the output terminal OUT is as shown by the arrow in FIG. 2(F). ! ? Noise is generated every 11 transition times, but since the delay time of the variable delay circuit 2 gradually changes by 11 non-pull times, there is always noise between adjacent ripple reconnaissances output from the variable delay circuit 2. This means that there is a correlation and the noise level can be reduced.

In the above embodiment, the delay ■ rate of change is constant and the delay transition 14 is variably controlled, but it is also possible to keep the delay transition time constant and change the delay amount change rate to be variable.
It is also possible to variably control both the delay amount change rate and the delay transition time.

In addition, in the above embodiment, in J3, the characteristic control signal C is delayed by 1t.
The conversion to m and processing was also converted to the specified signal Ca, but since there is a one-to-one correspondence between the delay amount of the characteristic control signal C2, the characteristic control signal C is processed immediately. In this case, the decoding circuit 6 and the encoding circuit 18 are unnecessary.

The control circuit 5 can also be constructed from a microconvenience store computer or a signal processing LSI.

[Also, in the above embodiment, a circuit consisting of a shift register and a switch was used as the variable delay means, but a d-plate element of a metric type or the like may be used as the variable delay means.

Effects of the Invention As detailed above, the comb filter according to the present invention has a characteristic that changes quickly when the specified time indicated by 0 signal changes.
Since the configuration is such that the signal d delay time of the variable delay means is changed every predetermined time Jj by a predetermined value that is smaller than the difference between the designated time 11 and the immediately following designated time, when the delay time of the variable delay means changes, Also, the noise level of the noise generated in the output signal obtained by processing the input and output of the variable delay means is reduced so that there is a correlation between adjacent 1 number values output from the variable delay means. - It is possible to do so. Therefore, according to the present invention, it is possible to reduce the influence of large noises and periodic noises that occur in conventional devices at the time of delay amount transition by turning them into white noise.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the device shown in FIG. 1, and FIG. 3 is a block diagram showing a conventional comb filter. , FIG. 4 is a timing chart showing the operation of the apparatus of FIG. Explanation of symbols of main parts 1...Addition circuit 2...Variable delay circuit 5...Control circuit

Claims (2)

[Claims] (1) A variable delay means that delays an input signal by a time specified by a specified signal, and a delay time that generates the specified signal that specifies the signal delay time of the variable delay means according to the specified time indicated by the characteristic control signal. A comb-shaped filter comprising a specifying means and a calculating means for outputting a signal obtained by arithmetic processing the input and delayed output of the variable delay means, wherein the delay time specifying means is configured to perform a process according to the specification indicated by the characteristic control signal. A comb filter, characterized in that when time changes, the specified signal is generated that specifies a signal delay time that changes at predetermined time intervals with a predetermined value that is smaller than the difference between specified times immediately before and after the change. (2) The delay time specifying means includes a storage means for storing a value immediately before a change in the specified time indicated by the characteristic control signal, and a storage means for indicating a difference between a value immediately after the change in the specified time and the storage contents of the storage means. a change amount detection means for generating a change amount detection signal;
a rate of change setting means for setting a delayed rate of change by generating a rate of change signal indicating a value smaller than the value indicated by the change amount detection signal; and a ratio of two values respectively indicated by the change amount detection signal and the change rate signal. a delay transition time setting means for generating data indicating a number of times according to the delay transition time and setting the delay transition time;
a correction signal generating means for generating a delay change amount correction signal indicating a time at which the change rate signal changes by a value indicated by the change rate signal at intervals of the predetermined time a number of times indicated by the output data of the delay transition time setting means; and a memory in the memory means. The comb according to claim 1, further comprising an adding means for outputting a signal indicating a value obtained by adding the content and the value indicated by the delay change amount correction signal as the designated signal. filter.