JPS62132343A - Semiconductor device - Google Patents

Abstract

PURPOSE:To reduce a parasitic capacity generated in a separating groove by laminating insulators having different viscosities to form an insulator region, thereby forming a cavity in the separating groove of a semiconductor device. CONSTITUTION:A cavity 21 is formed in a polyimide region 16 of a separating groove 6. A low viscosity polyimide region 22 is formed in the groove 6, and a high viscosity polyimide region 23 is thereafter formed to obtain the cavity 21. Thus, the cavity 21 is formed in the groove 6 to reduce a parasitic capacity generated from the separating groove.

Description

[Detailed description of the invention] (b) Industrial application field The present invention relates to a semiconductor device having an isolation trench.

(b) Conventional technology FIG. 5 is a cross-sectional view of a conventional semiconductor device having an isolation trench, in which (1) is a GaAs substrate, and this GaAs substrate (1) has a semi-insulating region (2), This semi-insulating area (2)
Furthermore, the impurity region (3) is composed of an n → low resistance layer (4) epitaxially grown on the semi-insulating region (2) and a low resistance layer (4) formed on the semi-insulating region (2). 1 (5) epitaxially grown on a resistive layer (4). Reference numeral (6) denotes a separation trench which is vertically etched to divide the impurity region (3) and reach the semi-insulating region (2). This separation groove (6)
Accordingly, the impurity region (3) is located between the first and second element regions (
The first element region (7) and the second element region (8) are electrically independent from each other.

The first and second element regions (?) (8) include the first and second element regions (?) (8), respectively.
A second diode (9) (10) is provided. (
11) and (12) are the first and second element regions (7) and (8), respectively.
), the first layer is Schottky-junctioned with the active layer (5).
, second Schottky electrodes, (13) and (14> are first and second Ohmink electrodes that surround the first and second Schottky electrodes (11) and (12) and are ohmically connected to the low resistance M(4). The first and second shot raw electrodes (tt)
(t2) are respectively 1st. Second diode (9) (10
) acts as an anode electrode, and the first and second ohmic electrodes (13) and (14) act as cathode electrodes <, (1
5) is S sputtered on the active layer (5).
iO2 film, with this 5iOz film (15),
The Schottky junction diameters of the first and second Schottky electrodes (11) and (12) are being determined.

(16) is a polyimide region as an insulator region formed on the upper surface of the element including the isolation groove (6).

(17) is the first beam lead electrode formed integrally with the first Schottky electrode (11), (18) is the first ohmic electrode (13) and the second Schottky electrode (12).
The lead electrode (19) is a second beam lead electrode connected to the second ohmink electrode (14), and the first and second beam lead electrodes (17) and (19) are made of polyimide. They extend outward from the upper surface of the region (16) in opposite directions. (20> is the base (1)
This is an aluminum film deposited on the back side of the

Here, the insulator region (16) is formed by placing a predetermined amount of high-purity gold [
This is accomplished by applying a polyimide resin to a desired viscosity by adding the agent DMAC (di-notylacetamide) using a spinner, and baking it (approximately 180° C., 30 minutes). However, the dielectric constant after polyimide resin baking is approximately 3.5, and the parasitic capacitance generated in the isolation groove (61 m wide, 15 μm deep, 220 μm deep) (6) is approximately 0.0.
It is as high as 179F and has an adverse effect on the operating speed and frequency characteristics of the circuit.

(c) Problems to be solved by the invention Conventionally, the parasitic capacitance generated in the isolation trench of a semiconductor device had a negative effect on the operating speed and frequency characteristics of the semiconductor device.The present invention aims to improve the performance of the semiconductor device. In order to measure the parasitic capacitance, the parasitic capacitance is minimized.

(d) Means for solving the problem The present invention is characterized in that when forming the insulator region, a cavity is formed in the separation groove by laminating insulators of different viscosities. .

(e) Effect: In the present invention, by stacking insulators of different viscosities to form an insulator region, it is possible to reduce the parasitic capacitance generated in the separation groove by creating a cavity in the molecule jltllll.

Embodiment 1 [XJ is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, which has the same shape as FIG. 5, and the same parts in FIG. 1 as in FIG. - Since the symbol is attached,
Description of these parts will be omitted.

The difference between the embodiment shown in FIG. 1 and the semiconductor device shown in FIG. 5 is that there is a cavity (
21) is being formed. This cavity (21
) will be explained below.

The viscosity of the polyimide resin formed in the separation groove (6) is reduced by adding a high purity diluent DMAC. D.M.A.
Polyimide resin without C added has a high viscosity, and when it is coated with a spinner on a GaAs substrate (1) in which separation grooves are formed, the high viscosity polyimide resin (22 ) does not enter the separation groove (6), and when DMAC is added to the polyimide resin to lower its viscosity, when it is coated on the GaAs substrate (1) with a spinner, as shown in Figure 3, the polyimide resin with low viscosity is deposited in the separation groove (6). (23)
Although it enters the separation groove (6), it cannot completely fill the inside of the separation groove (6) and is only formed on the inner wall of the separation groove (6). From the above, the void m (21) can be obtained by forming a low viscosity polyimide resin Wa (22) in the separation groove (6) and then forming a high viscosity polyimide resin (23) as shown in FIG. . Furthermore, when a cavity (21) is formed as shown in FIG. 2, the GaAs surface is exposed, and current flows through the GaAs surface, resulting in poor reliability.

By the above method, the cavity (21) shown in FIG.
), it is possible to reduce the parasitic capacitance generated from the isolation trench.

Furthermore, if the large hindrance of the separation groove (6) is the same as the conventional example, and the thickness of the low-viscosity polyimide JAW (23) is 1 μm, the parasitic capacitance generated in the separation groove (6) is half that of the conventional example. It is approximately 0,00649 F as follows.

(G) Effects of the Invention As is clear from the above description, when forming an insulating material region in an isolation trench provided in a semiconductor device, the present invention improves the separation trench by depositing insulators with different viscosities. A cavity is formed inside to reduce the parasitic capacitance generated in the isolation groove.
It is possible to improve the performance of semiconductor devices.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention. FIGS. 2, 3, and 4 are cross sections of the semiconductor device of the embodiment of the present invention near the isolation trench! 5. FIG. 5 is a sectional view of a conventional semiconductor device. (1)...Substrate, (6)...Separation groove, (16)...
- Insulator region, (21)...Cavity, (22)...High viscosity polyimide resin, (23)...Low viscosity polyimide resin.

Claims (1)

[Claims] (1) A semi-insulating region, an impurity region formed on this semi-insulating region, an isolation trench formed by dividing this impurity region until it reaches the semi-insulating region, and an element including this isolation trench. an insulator region formed on an upper surface, the insulator region in the isolation trench is provided with a cavity, and the cavity is formed of a low-viscosity insulator formed on an inner wall portion of the isolation trench. and a high-viscosity insulator formed at the opening of the separation trench.