JPH0199254A - Semiconductor device with groove digging type isolating layer and manufacture thereof - Google Patents

Abstract

PURPOSE:To mount a chip having a small capacity in high density by forming the substrate potential of a semiconductor device in a structure for taking the potential from the surface of the device. CONSTITUTION:A high concentration n-type impurity buried layer 2, a low impurity concentration n-type epitaxially grown layer 3 and a silicon oxide film 4 are sequentially laminated on a p-type silicon substrate 1. Then, a narrow groove G1 is formed on an interelement isolating region and a wide groove G2 is formed on a region except the isolating region. Then, a thick oxide film 5 is deposited on the oxide film 4, the grooves G1, G2, and a groove digging isolating layer 5 is formed. The film 5 is dry etched, only the part of the groove G1, the surface of the layer 3 and the sidewalls of the wide groove G2 are left to remain, and the bottom of the groove G2 is flatly removed until the surface of the substrate 1 is presented. Then, a p-type aluminum electrode 6 exposed in the bottom of the groove G2 is formed. The substrate potential can be taken from the surface of the semiconductor device.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a semiconductor device having a grooved isolation layer and a method for manufacturing the same, and particularly to a semiconductor integrated circuit device using a trench filling method for isolation between elements. This relates to the formation of substrate electrodes.

[Prior Art] FIG. 2 is a partial cross-sectional view showing an example of a semiconductor device having a conventional trench-type isolation layer.

In the figure, an n-type impurity physical implantation layer 2 and an n-type epitaxial growth layer 3 are formed on a p-type silicon substrate 1. A groove for isolation between elements is formed in the n-type impurity physical implantation layer 2 and the n-type epitaxial growth layer 3 so as to reach the p-type silicon substrate 1. An oxide film 7, which is a film made of an insulator, is buried in this trench to form a trench-type isolation layer, thereby providing isolation between the elements.

In a semiconductor device having such a grooved isolation layer, the following process is generally performed to obtain a substrate potential. First, a backside metallizing process is performed on the backside of the p-type silicon base 1 in order to form, for example, a Ti-Ni-Au film 8 . A p-type silicon substrate 1 having a Ti--Ni--Au film 8 formed on its back surface is bonded to the surface of an assembly package 10 with solder 9. The upper surface of this assembly package 10 is typically a metal surface called a die pad area. Therefore, in the semiconductor device configured in this way, the substrate potential is collected from the die pad region of the assembly package 10 from the p-type silicon substrate 1 through the Ti--Ni--Au film 8.

[Problems to be Solved by the Invention] However, in a semiconductor device having a conventional grooved isolation layer as described above, it is necessary to perform die bonding to the substrate in order to take the substrate potential from the die pad area of the assembly package. Ta.

This poses a problem in that it is difficult to perform high-density chip packaging and hinders the speeding up and high integration of semiconductor devices.

Therefore, this invention was made to solve the above-mentioned problems, and it makes it possible to take the substrate potential from the surface of the semiconductor device, and also makes it possible to realize high-density chip mounting in a small volume. The purpose of this invention is to obtain a semiconductor device and a method for manufacturing the same.

[Means for Solving the Problems] A semiconductor device having a trench type isolation layer for element isolation according to the present invention includes a first groove in an element isolation region and a groove in a region other than the element isolation region. A second groove is formed in a predetermined region so as to reach the semiconductor substrate. The first trench is filled with an insulating film, thereby forming an Fj trench isolation layer. Further, the second groove exposes the surface of the semiconductor substrate at least at the bottom, and a substrate electrode is formed on the surface.

Further, a method of manufacturing a semiconductor device in which a trench type isolation layer for isolation between elements is formed according to the present invention is characterized by comprising the following steps.

(a) A step of forming a first trench in the element isolation region and a second trench in a predetermined region other than the element isolation region so as to reach the semiconductor substrate.

(b) A step of depositing an insulating film in the first groove and the second groove.

(c) selectively etching the insulating film to expose the surface of the semiconductor substrate at the bottom of the second groove;

(d) forming a substrate electrode on the bottom surface of the second groove;

[Function] In the semiconductor device according to the present invention, a substrate electrode is formed at the bottom of a groove exposing the surface of the semiconductor substrate. Therefore, the substrate potential can be taken from the surface of the semiconductor device.

Further, according to the method of manufacturing a semiconductor device according to the present invention, a groove reaching the semiconductor substrate is formed in order to form a substrate electrode. This groove can be formed in the same process as forming the groove for isolation between elements.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

1A to 1D are partial cross-sectional views showing the method of manufacturing a semiconductor device according to the present invention in the order of main steps.

First, referring to FIG. 1A, a high concentration n-type impurity physical implantation layer 2, a low impurity concentration n-type epitaxial growth layer 3, and a silicon oxide film 4 are stacked in this order on a p-type silicon substrate 1. Thereafter, narrow trenches 61 in the element isolation region and wide trenches 62 in other regions are formed by anisotropic etching using the silicon oxide film 4 as a mask until the p-type silicon substrate 1 is reached. Form.

Next, as shown in FIG. 1B, in order to fill the trenches 61 for element isolation with an insulator, the silicon oxide film 4, trenches Gl, G
A thick oxide film 5 is deposited on 2 by CVD or the like. At this time, the trench G1 for isolation between elements is filled with the oxide film 5 to form a trench type isolation layer. However, the wide groove 62 is not uniformly filled with the oxide film 5.

As shown in the figure, the oxide film 5 is deposited along the groove 62 and has a shape that thickly covers the side wall portion, but does not completely fill the groove 02.

Referring to FIG. 1C, oxide film 5 is selectively removed using an etch-back method of dry etching.

In this case, the oxide film is left only on the groove 61, the surface of the n-type epitaxial growth layer 3, and the sidewalls of the wide groove 62, and the bottom of the wide groove 62 is left on the surface of the p-type silicon substrate 1. Remove it evenly until it appears.

Thereafter, as shown in FIG. 1D, an aluminum electrode 6 is formed on the surface of the p-type silicon substrate 1 exposed at the bottom of the groove 02.

The aluminum electrode 6 as a substrate electrode formed in this way makes it possible to take the substrate potential from the surface of the semiconductor device. Therefore, there is no need to perform die bonding to obtain the substrate potential, and the flip-chip method, T
AB (Tape Automated Bond
ing) method makes it possible to implement high-density chip packaging.

Moreover, the groove 62 for forming the substrate electrode can be formed in the same process as the process for forming the groove 01 for isolation between elements. Therefore, there is no need to increase the number of steps to form the substrate electrode on the surface of the semiconductor device.

In this example, the groove in which the substrate electrode is formed is wider than the groove for isolation between elements, but at least the etching method described above allows only the bottom of the groove to be exposed. Any width may be used. Further, the semiconductor device to which the present invention is applied is not limited to one having the structure of the above embodiment, but may be any one having at least a grooved isolation layer.

[Effects of the Invention] As described above, the semiconductor device of the present invention has a structure in which the substrate potential of the semiconductor device is taken from the surface of the semiconductor device, so there is no need for die bonding, and it is possible to achieve high density in a small volume. chip mounting becomes possible.

Further, in the manufacturing method of the present invention, the groove for taking the substrate potential can be formed in the same process as the groove for isolation between elements, so the number of steps does not increase, and the process according to the present invention can be easily performed. structure can be obtained.

[Brief explanation of the drawing]

1A, 1B, 1C, and 1D are partial cross-sectional views showing the manufacturing method of a semiconductor device according to an embodiment of the present invention in the order of steps, and FIG. 2 is a partial cross-sectional view showing a conventional semiconductor device. It is. In the figure, 1 is p-type silicon M [2, 2 is n-type impurity physical implantation layer, 3 is n-type epitaxial growth layer, 4 is silicon oxide film, 5 is oxide film, 6 is aluminum 11yw,
Gl and G2 are grooves. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (4)

[Claims] (1) In a semiconductor device having a trench-type isolation layer for isolation between elements, a first groove in an isolation region and a second groove in a predetermined region other than the isolation region for semiconductor The first trench is formed to reach the substrate, the first trench is filled with an insulating film, thereby forming a trench isolation layer, and the second trench exposes the surface of the semiconductor substrate at least at the bottom. What is claimed is: 1. A semiconductor device having a grooved separation layer, characterized in that a substrate electrode is formed on the surface of the semiconductor device. (2) The semiconductor device is formed by sequentially stacking an impurity physical implantation layer of a second conductivity type, an epitaxial growth layer, and a first oxide film on the surface of a silicon substrate of a first conductivity type, and and the second groove are formed to reach the first conductivity type silicon substrate from the first oxide film, the first groove is filled with a second oxide film, and the first groove is filled with a second oxide film. 2. The semiconductor device according to claim 1, wherein the second trench has a side wall portion covered with a second oxide film, and a bottom portion of which is formed with an electrode for the silicon substrate. (3) A method for manufacturing a semiconductor device having a grooved isolation layer for isolation between elements, comprising: a first groove in an isolation region; and a second groove in a predetermined region other than the isolation region. a step of depositing an insulating film in the first trench and the second trench; and selectively etching the insulating film to form the second trench. manufacturing a semiconductor device having a trench-type isolation layer, comprising: exposing the surface of the semiconductor substrate at the bottom of the second trench; and forming a substrate electrode on the bottom surface of the second trench. Method. (4) The method for manufacturing the semiconductor device includes a step of sequentially stacking and forming an impurity physical implantation layer of a second conductivity type, an epitaxial growth layer, and a first oxide film on the surface of a silicon substrate of a first conductivity type. , etching the first groove in the element isolation region and the second groove in a predetermined region other than the element isolation region using the first oxide film as a mask; a step of depositing a second oxide film on the first trench, the second trench and the first oxide film; exposing the surface of the silicon substrate at the bottom of the second trench by selectively etching the oxide film of the second trench; and forming an electrode for the silicon substrate on the bottom surface of the second trench. A method for manufacturing a semiconductor device according to claim 3, comprising the steps of: