JPS62129821U - - Google Patents
Info
- Publication number
- JPS62129821U JPS62129821U JP19686U JP19686U JPS62129821U JP S62129821 U JPS62129821 U JP S62129821U JP 19686 U JP19686 U JP 19686U JP 19686 U JP19686 U JP 19686U JP S62129821 U JPS62129821 U JP S62129821U
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- loudness
- circuit
- variable resistance
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000009499 grossing Methods 0.000 description 1
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Description
第１図は本考案の一実施例を示すブロツク図、
第２図は入力信号レベルに対する制御電圧を示す
線図である。
１……入力端子、２……出力端子、３，４，５
，６……抵抗器、７，８……コンデンサ、９，１
０……ＦＥＴ、１１，１２……ダイオード、１３
……タツプ付可変抵抗器、１４……検波器、１５
……平滑回路、１６……反転回路、１７……レベ
ルシフト回路。
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a diagram showing control voltage versus input signal level. 1...Input terminal, 2...Output terminal, 3, 4, 5
,6...Resistor,7,8...Capacitor,9,1
0...FET, 11, 12...Diode, 13
...Variable resistor with tap, 14...Detector, 15
... Smoothing circuit, 16 ... Inversion circuit, 17 ... Level shift circuit.
Claims (1)
器を接続し、上記入力端子と中間端子間に第１の
抵抗器と第１のコンデンサの第１の直列回路を接
続し、上記中間端子と接地間に第２の抵抗器と第
２のコンデンサの第２の直列回路を接続したラウ
ドネス回路において、上記第１の抵抗器の少くと
も１部を第１の可変抵抗素子とし、上記第２のコ
ンデンサに並列に第２の可変抵抗素子を接続し、
上記第１及び第２の可変抵抗素子の抵抗値を入力
信号レベルに応じて互いに逆方向に変化する様に
制御したラウドネス回路。 A variable resistor having an intermediate terminal is connected between the input terminal and ground, a first series circuit of a first resistor and a first capacitor is connected between the input terminal and the intermediate terminal, and the intermediate terminal is connected to the ground. In a loudness circuit in which a second series circuit of a second resistor and a second capacitor is connected between the loudness circuits, at least a part of the first resistor is used as a first variable resistance element; A second variable resistance element is connected in parallel to
A loudness circuit that controls the resistance values of the first and second variable resistance elements to change in opposite directions depending on the input signal level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19686U JPH0145155Y2 (en) | 1986-01-06 | 1986-01-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19686U JPH0145155Y2 (en) | 1986-01-06 | 1986-01-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62129821U true JPS62129821U (en) | 1987-08-17 |
| JPH0145155Y2 JPH0145155Y2 (en) | 1989-12-27 |
Family
ID=30776955
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19686U Expired JPH0145155Y2 (en) | 1986-01-06 | 1986-01-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0145155Y2 (en) |
-
1986
- 1986-01-06 JP JP19686U patent/JPH0145155Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0145155Y2 (en) | 1989-12-27 |