JPS6293811U - - Google Patents
Info
- Publication number
- JPS6293811U JPS6293811U JP18386085U JP18386085U JPS6293811U JP S6293811 U JPS6293811 U JP S6293811U JP 18386085 U JP18386085 U JP 18386085U JP 18386085 U JP18386085 U JP 18386085U JP S6293811 U JPS6293811 U JP S6293811U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- time constant
- control element
- amplifier
- alc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000903 blocking effect Effects 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
第１図は本考案の１実施例の回路図、第２図及
び第３図はともに従来例の回路図である。
Ｔ１……入力端子、Ｔ２……出力端子、Ｄ１，
Ｄ２……整流用ダイオード、Ｄ３……逆流阻止用
ダイオード、Ｒ３，Ｃ３……並列時定数回路を構
成する抵抗とコンデンサ、Ｒ４，Ｃ４……直列時
定数回路を構成する抵抗とコンデンサ、Ｑ１，Ｑ
２……レベル制御用トランジスタ。
FIG. 1 is a circuit diagram of one embodiment of the present invention, and FIGS. 2 and 3 are both circuit diagrams of a conventional example. T1 ...Input terminal, T2 ...Output terminal, D1 ,
D 2 ... Rectifying diode, D 3 ... Reverse current blocking diode, R 3 , C 3 ... Resistor and capacitor forming a parallel time constant circuit, R 4 , C 4 ... Resistor forming a series time constant circuit and capacitor, Q 1 , Q
2 ...Level control transistor.
Claims (1)
記増幅器の出力信号を整流回路にて整流して得ら
れる直流電圧を前記制御素子の制御端子に印加し
て過大入力時の出力レベルを制御するＡＬＣ回路
において、前記制御素子と整流回路との間にＲＣ
並列時定数回路と、ＲＣ直列時定数回路を挿入す
るとともに前記両時定数回路間に逆流阻止用ダイ
オードを挿入したことを特徴とするＡＬＣ回路。 An ALC in which a level control element is inserted into the input side of an amplifier, and a DC voltage obtained by rectifying the output signal of the amplifier in a rectifier circuit is applied to a control terminal of the control element to control the output level at the time of excessive input. In the circuit, an RC is connected between the control element and the rectifier circuit.
An ALC circuit characterized in that a parallel time constant circuit and an RC series time constant circuit are inserted, and a backflow blocking diode is inserted between the two time constant circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18386085U JPS6293811U (en) | 1985-11-28 | 1985-11-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18386085U JPS6293811U (en) | 1985-11-28 | 1985-11-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6293811U true JPS6293811U (en) | 1987-06-15 |
Family
ID=31130981
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18386085U Pending JPS6293811U (en) | 1985-11-28 | 1985-11-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6293811U (en) |
-
1985
- 1985-11-28 JP JP18386085U patent/JPS6293811U/ja active Pending
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