JPS6212976U - - Google Patents

Info

Publication number
JPS6212976U
JPS6212976U JP10455685U JP10455685U JPS6212976U JP S6212976 U JPS6212976 U JP S6212976U JP 10455685 U JP10455685 U JP 10455685U JP 10455685 U JP10455685 U JP 10455685U JP S6212976 U JPS6212976 U JP S6212976U
Authority
JP
Japan
Prior art keywords
hole
pattern
longitudinal direction
substrate
extending
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10455685U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10455685U priority Critical patent/JPS6212976U/ja
Publication of JPS6212976U publication Critical patent/JPS6212976U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案によるプリント基板の第1の実
施例を示す略線図、第2図は本考案の第2の実施
例を示す略線図、第3図は本考案の原理を示す略
線図、第4図は本考案のプリント基板を適用する
VTRのテープフオーマツトを示す略線図、第5
図はVTRのヘツド取付位置を示す略線図、第6
図はVTRの再生モジユールの平面図である。 5……再生モジユール(プリント基板)、8A
,8B……幅狭部、9……基板、10〜13……
信号線、14……スルーホール。
FIG. 1 is a schematic diagram showing a first embodiment of a printed circuit board according to the present invention, FIG. 2 is a schematic diagram showing a second embodiment of the present invention, and FIG. 3 is a schematic diagram showing the principle of the present invention. Figure 4 is a schematic diagram showing the tape format of a VTR to which the printed circuit board of the present invention is applied;
The figure is a schematic diagram showing the VTR head installation position.
The figure is a plan view of a reproduction module of a VTR. 5...Recycled module (printed circuit board), 8A
, 8B... Narrow portion, 9... Board, 10-13...
Signal line, 14...Through hole.

Claims (1)

【実用新案登録請求の範囲】 幅狭の基板と、 当該基板の一面上を長手方向に延びるパターン
を設け、当該パターンの先端部にスルーホールを
設け、当該スルーホールから上記基板の他面上を
長手方向に延びるパターンを設け、当該パターン
の先端部にスルーホールを設け、当該スルーホー
ルから上記基板の一面上を長手方向に延びるパタ
ーンを設け、以下、スルーホール、他面側パター
ン、スルーホール、一面側パターンを順次繰返し
設けてなる、所定信号を伝送する少なくとも一対
の信号線とを具え、 対をなす上記両信号線が互に撚り合わされたよ
うに延長し、 対をなす上記両信号線の複数の上記スルーホー
ルを互に長手方向に離間して配置するように したことを特徴とするプリント基板。
[Scope of Claim for Utility Model Registration] A narrow substrate, a pattern extending in the longitudinal direction on one surface of the substrate, a through hole provided at the tip of the pattern, and a through hole extending from the through hole onto the other surface of the substrate. A pattern extending in the longitudinal direction is provided, a through hole is provided at the tip of the pattern, and a pattern is provided that extends from the through hole in the longitudinal direction on one surface of the substrate, hereinafter referred to as a through hole, a pattern on the other side, a through hole, at least one pair of signal lines for transmitting a predetermined signal, each of which is formed by sequentially repeating a pattern on one side, the pair of signal lines extending as if twisted together; A printed circuit board characterized in that a plurality of the above-mentioned through holes are spaced apart from each other in the longitudinal direction.
JP10455685U 1985-07-08 1985-07-08 Pending JPS6212976U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10455685U JPS6212976U (en) 1985-07-08 1985-07-08

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10455685U JPS6212976U (en) 1985-07-08 1985-07-08

Publications (1)

Publication Number Publication Date
JPS6212976U true JPS6212976U (en) 1987-01-26

Family

ID=30978160

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10455685U Pending JPS6212976U (en) 1985-07-08 1985-07-08

Country Status (1)

Country Link
JP (1) JPS6212976U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016092405A (en) * 2014-11-04 2016-05-23 キヤノン株式会社 Printed circuit board, printed wiring board, and differential transmission circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553732A (en) * 1978-06-22 1980-01-11 Karupisu Shokuhin Kogyo Kk Preparation of organized protein
JPS56129386A (en) * 1980-03-13 1981-10-09 Mitsubishi Electric Corp Printed board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS553732A (en) * 1978-06-22 1980-01-11 Karupisu Shokuhin Kogyo Kk Preparation of organized protein
JPS56129386A (en) * 1980-03-13 1981-10-09 Mitsubishi Electric Corp Printed board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016092405A (en) * 2014-11-04 2016-05-23 キヤノン株式会社 Printed circuit board, printed wiring board, and differential transmission circuit

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