JPS62128561A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide a high frequency high output semiconductor device which has the respective features of an FET and a bipolar transistor by forming the FET and the bipolar transistor in the same semiconductor substrate adjoining to each other. CONSTITUTION:A bipolar transistor Q1 and an FET Q2 are provided in a same semiconductor substrate adjoining to each other. The source terminal of the FET Q2 and the base terminal of the transistor Q1 are electrically connected by a metal layer 18 on the substrate surface. The semiconductor substrate is constituted as a common region of the drain D of the FET Q2 and the collector C of the transistor Q1. The gate electrode 17 of the FET Q2, the backplane electrode 20 of the semiconductor substrate and the emitter electrode 19 of the transistor Q1 are provided as an input terminal 1, an output terminal and a common grounding terminal respectively. When a positive voltage is applied to the input terminal 1, the drain current ID of the MOS FET Q2 is increased and the base current IB of the transistor Q1 is increased and the collector current IC multiplied by beta by the transistor Q1 is increased. When a negative voltage is applied to the input terminal 1, the collector current IC is reduced. In other words, the device operates basically as an amplifier and a switching device.

Description

[Detailed Description of the Invention] [Summary] 1? A composite device consisting of an ET and a bipolar transistor is configured in the same semiconductor chip, and has the characteristics of both.
1 (This is a high frequency, high power semiconductor device that operates as an lffl device.

[Industrial application field]

The present invention relates to a high frequency, high power semiconductor device, and more specifically, a bipolar transistor and a field effect transistor (FET) are arranged next to each other in the same semiconductor substrate, and the advantages of both are combined. The present invention relates to a semiconductor device for high frequency and high output.

C. Prior Art) High-frequency, high-output bipolar transistors have a large ratio of output power to chip area.

The chip area is small, the cost is low, and the so-called ON resistance is small, resulting in low power loss.

On the other hand, high frequency high power field effect transistor (PET
) has the advantage of high input impedance because it is a voltage-driven type (2), when the channel temperature rises, the channel resistance increases and the channel operating current decreases, making it difficult to cause thermal runaway.

[Problem that the invention seeks to solve]

However, in bipolar transistors, ■As they are current-driven devices, their input impedance is extremely small, a few ohms or less, making it difficult to design and manufacture impedance matching circuits.■The temperature coefficient of the operating current is positive, resulting in thermal runaway. There is a problem in that it is easy to cause damage and damage.

High-frequency, high-output +JETs have inferior chip area efficiency compared to bipolar transistors, so a chip with a large operating current capacity must be large;
Due to its structure and operating principle, it has a problem that its ON resistance is larger than that of a bipolar transistor, and power loss is large.

The present invention was created in view of these points, and it is an object of the present invention to provide a high frequency, high power semiconductor amplifier element that has the advantages of both bipolar transistors and FETs.

[Means for solving problems]

FIG. 1 is a sectional view of an embodiment of the present invention, and in the same figure,
11 and 12 are an n-type layer (for example, a buried layer) and an n-type layer (epitaxial In) of an n/n+ type semiconductor substrate, 13 is a p-type base region, and 14 and 15 are formed in the p-type base region 13, respectively. n+ type source region and emitter region, 16
17 is a silicon dioxide (5iO2) film, 17 is a gate electrode, 18 is a connecting metal layer between the source and base regions, 19 is an emitter electrode, and 20 is a backside electrode 20 of the substrate.

In FIG. 1, a bipolar transistor 1 and a FET Q2 are arranged adjacent to each other in the same semiconductor substrate, and an FE
The source terminal of T Q2 and the base terminal of the old transistor are electrically connected by metal 1i18 on the substrate surface, and the semiconductor substrate is configured as a common area of the drain (D) of PET 02 and the collector (C) of transistor Q1, The gate electrode 17 of the FHT Ql is used as an input terminal (1), the back electrode 20 of the semiconductor substrate is used as an output terminal (2), and the emitter electrode 19 of the transistor Ω1 is used as a common ground terminal (3).

[Effect]

In the semiconductor device described above, bipolar type and field effect transistors are arranged and internally connected in one semiconductor chip, and the input impedance is high and the temperature coefficient is negative.
A high-frequency, high-output semiconductor device that is difficult to cause thermal runaway, has low ON resistance, low power loss, and has a chip area efficiency comparable to that of a bipolar type can be obtained.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a circuit diagram showing the principle of the present invention, and shows a combination of an N-channel MOS FET Q2 and an NPN bipolar transistor 01. PET Q2 is placed in the front stage, bipolar transistor Q1 is placed in the rear stage, and FET Q2
The drain terminal (D) of the transistor is connected to the collector terminal (C) of the old transistor to form the output terminal (2), and the source terminal (S
) and the base terminal (B) to make a common terminal (3),
Let the gate terminal be the input terminal (1).

Figure 3 is a circuit diagram for explaining the operating principle of the circuit in Figure 2. When a positive voltage is applied to input terminal 1, the MOS F
The drain current of ET Q2 increases, and therefore the base inflow current I8 of transistor 01 increases, which is doubled by transistor 01 and the collector inflow current rc increases.

Conversely, when a negative voltage is applied to the input terminal 1, the collector inflow current 1c decreases. That is, the device of the present invention can basically operate as an amplifying element and a switching element.

From the viewpoint of high frequency characteristics, N-channel MOS FET
Good results can be obtained by combining a P-channel type MO5I'ET and a PNP type transistor, and a junction type (J-FET) as an FET element is also possible.

In the device described above, since the FET is placed at the input, F(''IJ is extremely small and the input impedance is large.

Since a bipolar transistor is placed at the output, it is ON.
resistance becomes small.

In addition, since the two transistors are placed on the same chip, the junction temperature of the bipolar transistor, which amplifies, controls, and consumes a large amount of current, that is, large amount of power, is abnormally high. Since the channel temperature is also increased, the negative temperature coefficient characteristic results in a decrease in the base inflow current II3 and a decrease in the collector inflow current 1c, thereby preventing thermal runaway.

Since the current handled by the FET in the front stage can be 1/β of that of the bipolar transistor in the rear stage, a FET with a small pattern area (1/β in the case of a single FET) is sufficient, and there is little deterioration in the area efficiency of the chip.

Since the device of the present invention is a two-stage amplification device, the gain is high, and as a result, there is an advantage that the device can be made smaller.

Next, one method for manufacturing the device shown in FIG. 1 will be described with reference to FIG. 4 (al to dl cross-sectional views).

See Figure 4+a+: Evitaginyal 1i is placed on the n+ type substrate 11 using the usual technique.
12 (n-type with a degree of 10” to 10 I6/cm”)
grow.

See Figure 4+b>: Form an Sio2 film 21 on the surface of the epitaxial layer 12, pattern it, and implant boron ions (B) to a concentration of 10'' to 1017/cm'.
A mold base region 13 is formed.

FIG. 4 (see cl: SiO2 film 21 is completely removed, a new SiO2 film 22 is formed, and it is buttered as shown in the figure, and phosphorus ions (
P+) ions are implanted to form an n+ type source region 14 and emitter region 15.

See Figure 4(d): Remove 5i0211922, 5iOz 1IQ16
was formed to a thickness of 500 to 1000A, patterned as shown in the figure, and made of aluminum (1.0 μm thick).
The gate electrode I is grown to a thickness of
7. Source/base connection metal! 1B, emitter electrode 1
9 is formed, and then a substrate backside electrode 2o is formed.

〔Effect of the invention〕

As described above, according to the present invention, by arranging an FET and a bipolar transistor in contact with each other by 11J within the same semiconductor substrate, a high frequency, high output semiconductor device having the respective characteristics of both can be provided. It is.

[Brief Description of the Drawings] Figure 1 is a sectional view of an embodiment of the present invention, Figure 2 is a circuit diagram showing the principle of the invention, Figure 3 is a circuit diagram showing the operating principle of the circuit in Figure 2, and Figure 3 is a circuit diagram showing the principle of operation of the circuit in Figure 2. 4(a) to 4(d) are cross-sectional views showing the steps for making the device of FIG. 1. 1 to 4, 1 is an input terminal, 2 is an output terminal, 3 is a common terminal, 11 is an n + type layer, 12 is an n type epitaxial layer, IJ is a base region, 14 is an n + type source region, 15 is an n+ type emitter region, 16 is a 5i02 film, L7 is a gate electrode, 18 is a source/base connection metal IL, 19 is an emitter electrode, 20 is a back surface electrode of the substrate, and 21 and 22 are Sioz films. Irregular FIfJ protrusion example #rω diagram Figure 1 Book Δto Sun Moon 4L made! t ii;
syr, jU; Jk5D6.2+w
''Figure 4

Claims (1)

[Claims] A bipolar transistor (Q1) and a field effect transistor (FET) (
Q2) are arranged adjacent to each other, and the source terminal of the FET (Q2) and the base terminal of the bipolar transistor (Q1) are connected to a metal layer (1) on the substrate surface.
8), and the semiconductor substrates (11, 12) connect the drain (D) of the FET (Q2) and the collector (D) of the bipolar transistor (Q1).
C), where the gate electrode (17) of the FET (Q2) serves as the input terminal, the substrate back electrode (20) serves as the output terminal, and the emitter electrode (19) of the bipolar transistor (Q1) serves as the common ground terminal. A semiconductor device characterized by: