JPS6212529B2 - - Google Patents

Info

Publication number
JPS6212529B2
JPS6212529B2 JP53025281A JP2528178A JPS6212529B2 JP S6212529 B2 JPS6212529 B2 JP S6212529B2 JP 53025281 A JP53025281 A JP 53025281A JP 2528178 A JP2528178 A JP 2528178A JP S6212529 B2 JPS6212529 B2 JP S6212529B2
Authority
JP
Japan
Prior art keywords
instruction
flip
flop
register
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53025281A
Other languages
English (en)
Japanese (ja)
Other versions
JPS54117646A (en
Inventor
Yoshiaki Morya
Ichiro Kobayashi
Yukio Kitagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP2528178A priority Critical patent/JPS54117646A/ja
Priority to US06/017,617 priority patent/US4245327A/en
Publication of JPS54117646A publication Critical patent/JPS54117646A/ja
Publication of JPS6212529B2 publication Critical patent/JPS6212529B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30069—Instruction skipping instructions, e.g. SKIP
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP2528178A 1978-03-06 1978-03-06 Computer Granted JPS54117646A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2528178A JPS54117646A (en) 1978-03-06 1978-03-06 Computer
US06/017,617 US4245327A (en) 1978-03-06 1979-03-05 Data processor having two types of carry flags

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2528178A JPS54117646A (en) 1978-03-06 1978-03-06 Computer

Publications (2)

Publication Number Publication Date
JPS54117646A JPS54117646A (en) 1979-09-12
JPS6212529B2 true JPS6212529B2 (US06272168-20010807-M00014.png) 1987-03-19

Family

ID=12161631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2528178A Granted JPS54117646A (en) 1978-03-06 1978-03-06 Computer

Country Status (2)

Country Link
US (1) US4245327A (US06272168-20010807-M00014.png)
JP (1) JPS54117646A (US06272168-20010807-M00014.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6382622U (US06272168-20010807-M00014.png) * 1986-11-19 1988-05-31

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4449196A (en) * 1979-04-27 1984-05-15 Pritchard Eric K Data processing system for multi-precision arithmetic
US4589087A (en) * 1983-06-30 1986-05-13 International Business Machines Corporation Condition register architecture for a primitive instruction set machine
JPS62107339A (ja) * 1985-11-05 1987-05-18 Oki Electric Ind Co Ltd マイクロコンピユ−タの命令構成方法
US5471593A (en) * 1989-12-11 1995-11-28 Branigin; Michael H. Computer processor with an efficient means of executing many instructions simultaneously
US5410721A (en) * 1992-12-24 1995-04-25 Motorola, Inc. System and method for incrementing a program counter
JP2847688B2 (ja) * 1993-05-27 1999-01-20 松下電器産業株式会社 プログラム変換装置およびプロセッサ
JP2832899B2 (ja) * 1993-05-31 1998-12-09 松下電器産業株式会社 データ処理装置およびデータ処理方法
US5497493A (en) * 1993-09-30 1996-03-05 Intel Corporation High byte right-shift apparatus with a register alias table
JPH0816364A (ja) * 1994-04-26 1996-01-19 Nec Corp カウンタ回路とそれを用いたマイクロプロセッサ
JP3738134B2 (ja) * 1998-06-19 2006-01-25 三洋電機株式会社 デジタル信号処理装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4037090A (en) * 1974-11-19 1977-07-19 Texas Instruments Incorporated Multiphase clocking for MOS
US3956620A (en) * 1974-11-26 1976-05-11 Texas Instruments Incorporated Adder with carry enable for bit operations in an electric digital calculator
US3939335A (en) * 1974-11-26 1976-02-17 Texas Instruments Incorporated Universal condition latch in an electronic digital calculator
US4125867A (en) * 1976-10-27 1978-11-14 Texas Instruments Incorporated Electronic calculator or microprocessor having a hexadecimal/binary coded decimal arithmetic unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6382622U (US06272168-20010807-M00014.png) * 1986-11-19 1988-05-31

Also Published As

Publication number Publication date
JPS54117646A (en) 1979-09-12
US4245327A (en) 1981-01-13

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