JPS621247B2 - - Google Patents

Info

Publication number
JPS621247B2
JPS621247B2 JP11060780A JP11060780A JPS621247B2 JP S621247 B2 JPS621247 B2 JP S621247B2 JP 11060780 A JP11060780 A JP 11060780A JP 11060780 A JP11060780 A JP 11060780A JP S621247 B2 JPS621247 B2 JP S621247B2
Authority
JP
Japan
Prior art keywords
chip
wafer
chips
semiconductor wafer
defective
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11060780A
Other languages
Japanese (ja)
Other versions
JPS5735333A (en
Inventor
Kimio Meguro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP11060780A priority Critical patent/JPS5735333A/en
Publication of JPS5735333A publication Critical patent/JPS5735333A/en
Publication of JPS621247B2 publication Critical patent/JPS621247B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】 本発明は半導体ウエハの検査装置に係り、特に
半導体ウエハの電気的特性の測定に用いるプロー
バに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor wafer inspection apparatus, and more particularly to a prober used to measure the electrical characteristics of a semiconductor wafer.

半導体集積回路(IC)の製造工程において半
導体ウエハ上に形成されたICチツプの電気的特
性を測る装置として被測定ウエハを載せたウエハ
台をチツプサイズに応じて順次ステツプさせ、ウ
エハ上に形成された各々のチツプの自動測定を行
ない、その測定結果により不良チツプを判別する
ためのマークをつける装置としてプローバーが使
われている。また特性測定のために被測定チツプ
の電極に測定用プローブを接触させる方法とて、
チツプの電極に合わせてプローブを基板に固定し
たプローブカードが使われ、不良チツプの判別用
マークとしては各々のICチツプの測定後不良チ
ツプにはレーザ光を照射し表面を溶融させる方法
などが知られている。
As a device for measuring the electrical characteristics of IC chips formed on a semiconductor wafer in the manufacturing process of semiconductor integrated circuits (IC), a wafer stand carrying a wafer to be measured is sequentially stepped according to the chip size to measure the electrical characteristics of IC chips formed on the wafer. A prober is used as a device that automatically measures each chip and marks it based on the measurement results to identify defective chips. In addition, there is a method of bringing a measurement probe into contact with the electrodes of the chip under test to measure the characteristics.
A probe card is used that has probes fixed to a substrate in alignment with the electrodes of the chip, and a method is known in which a laser beam is irradiated to the defective chip to melt the surface after each IC chip is measured, as a mark for identifying defective chips. It is being

以下に従来の検査装置を第1図の正面図を用い
て説明する。被測定ウエハ5はウエハ台7に載せ
られ、ウエハ台昇降駆動部14により押し上げら
れた状態で保持台8に保持されたプローブカード
6の中心部に固定されたプローブ4と接触する。
その状態で特性の測定が行なわれる。測定の結果
が不良チツプと判定された場合はレーザ装置1が
作動し集光レンズ2で集光されたレーザー光は光
軸3の径路によりウエハ面に照射される。その後
ウエハ台7は下降しチツプサイズに応じてXモー
タ11が回転し、Xリードスクリユー12により
Xステージ13が移動し、再びウエハ台7が上昇
し次のICチツプの測定を行なう。またY軸方向
の移動はYモータに駆動されるYリードスクリユ
10およびYステージ9により行なわれる。以上
述べてきたように半導体ウエハ上に形成された
ICチツプはプローバが順次ステツプすることに
より各々自動測定され、不良チツプにはマークが
付される。
A conventional inspection device will be explained below using the front view of FIG. The wafer 5 to be measured is placed on the wafer stand 7 and is pushed up by the wafer stand lift drive unit 14 into contact with the probe 4 fixed to the center of the probe card 6 held on the holding stand 8 .
The characteristics are measured in this state. If the result of the measurement is determined to be a defective chip, the laser device 1 is activated and the laser beam focused by the condenser lens 2 is irradiated onto the wafer surface through the path of the optical axis 3. Thereafter, the wafer stage 7 is lowered, the X motor 11 is rotated according to the chip size, the X stage 13 is moved by the X lead screw 12, and the wafer stage 7 is raised again to measure the next IC chip. Further, movement in the Y-axis direction is performed by a Y lead screw 10 and a Y stage 9 driven by a Y motor. As mentioned above, the
Each IC chip is automatically measured by sequential steps of the prober, and defective chips are marked.

このような自動測定において、装置の効率を上
げるため第2図に示すとおりICチツプA19、
ICチツプ13,17のそれぞれの電極16にプ
ローブ4を合わせ複数のチツプを同時に測定する
ことが行なわれている。これは装置の効率を上げ
るにはきわめて有効な方法であるが、第2図のよ
うに2個のICチツプを同時に測定する場合は不
良チツプにマークを付ける装置も2台必要とす。
In order to increase the efficiency of the device in such automatic measurements, the IC chip A19, as shown in Figure 2, is used.
The probe 4 is placed on each electrode 16 of the IC chips 13 and 17 to simultaneously measure a plurality of chips. This is an extremely effective method for increasing the efficiency of the device, but when measuring two IC chips at the same time as shown in Figure 2, it also requires two devices to mark defective chips.

従つて、本発明の目的は、かかる2個のICチ
ツプを同時に測定する場合の不良マーキングにお
いて1台のレーザマーキング装置にて、同時測定
された二個のICチツプに不良マークをつける手
段を提供するものである。
Therefore, an object of the present invention is to provide a means for marking two IC chips simultaneously measured as defective using one laser marking device. It is something to do.

本発明は半導体ウエハの電気的特性の測定に用
いるプローバのレーザマーキング装置において、
ウエハ面の鉛直方向における位置を移動させウエ
ハ面に対して斜め方向から照射されるレーザ光と
の交差位置を変えることにより、同時に測定され
た例えば2個のそれぞれのICチツプに、1台の
レーザマーキング装置によりマークを付けること
を特徴とする。
The present invention provides a laser marking device for a prober used to measure the electrical characteristics of semiconductor wafers.
By moving the vertical position of the wafer surface and changing the intersection position with the laser beam irradiated obliquely to the wafer surface, one laser beam can be applied to each of two IC chips that are measured simultaneously. It is characterized by marking by a marking device.

以下に本発明を実施例により説明する。第3図
A、第3図Bは本発明の一実施例を示す正面図、
第4図はその部分の平面図である。レーザ光は集
光レンズ部2により集光され、光軸3に示すよう
に半導体ウエハ5に形成されたICチツプA19
に照射され、ICチツプA19の表面を溶融する
ことによりマークをつけ、次にウエハ台7を△h
下げることによりレーザ光とウエハ面の交差位置
を変えICチツプB17にレーザマークをつけ
る。このときのウエハ台の移動量△Hは、ICチ
ツプAとICチツプBのマーキング位置の距離を
lとし、レーザ光の照射角度をθとすると△h=
ltanθで求まる。
The present invention will be explained below using examples. FIG. 3A and FIG. 3B are front views showing an embodiment of the present invention;
FIG. 4 is a plan view of that part. The laser beam is focused by the condensing lens section 2, and as shown on the optical axis 3, the laser beam is focused on the IC chip A19 formed on the semiconductor wafer 5.
The surface of the IC chip A19 is melted to make a mark, and then the wafer table 7 is irradiated with △h.
By lowering it, the intersection position between the laser beam and the wafer surface is changed and a laser mark is made on IC chip B17. The amount of movement △H of the wafer stand at this time is △h=
It is determined by ltanθ.

以上により、本発明においては1台のレーザマ
ーキング装置により、容易に同時測定されたIC
チツプにマークをつけることができる。
As described above, in the present invention, ICs can be easily measured simultaneously using one laser marking device.
You can mark chips.

本発明はまた、ICチツプAとICチツプBとで
は、レーザの集光位置の違いにより、レーザのス
ポツト径が変わるためマークの形状がそれぞれ異
なることも特徴とする。これは、例えばICチツ
プAの測定系に異常のある場合など、ICチツプ
Aの側の形状の不良マークが連続することにな
り、容易に異常の有無が分かる。さらに、二個の
ICチツプにそれぞれマークをつけるのでなく、
同一チツプに位置を変えて複数のマークをつける
ことも本発明の特徴である。このことは、単位ロ
ツドごとにマーク形状を変えることなどができ、
識別に有利である。
The present invention is also characterized in that the shapes of the marks are different between IC chip A and IC chip B because the diameter of the laser spot changes depending on the difference in the focusing position of the laser. This means that, for example, if there is an abnormality in the measurement system of IC chip A, defective marks in the shape of the IC chip A side will be continuous, and the presence or absence of the abnormality can be easily determined. In addition, two
Rather than marking each IC chip,
Another feature of the present invention is that a plurality of marks can be placed on the same chip at different positions. This means that the mark shape can be changed for each unit rod.
It is advantageous for identification.

以上、詳細に説明したように本発明はプローバ
ーにおいてウエハ面とレーザマーキング装置より
照射されるレーザ光の交差位置を変えることによ
り、複数のICチツプにマークをつけることやマ
ークの形状を変えることができる。
As explained above in detail, the present invention enables marking a plurality of IC chips and changing the shape of the marks by changing the intersection position of the wafer surface and the laser beam irradiated by the laser marking device in the prober. can.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のプローバーを示す正面図、第2
図はICチツプを二個同時に測る場合のプローブ
部分の拡大平面図である。第3図A、第3図Bは
本発明の実施例を示す正面図、第4図は第3図の
部分平面図である。 尚図において、1……レーザ装置、2……集光
レンズ部、3……光軸、4……プローブ、5……
ウエハ、6……プローブカード、7……ウエハ
台、8……保持台、9……Yステージ、10……
Yリードスクリユー、11……Xモータ、12…
…Xリードスクリユー、13……Xステージ、1
4……ウエハ台昇降駆動部、15……台、16…
…電極、17……ICチツプB、18……孔、1
9……ICチツプA。
Figure 1 is a front view of a conventional prober, Figure 2 is a front view of a conventional prober;
The figure is an enlarged plan view of the probe part when measuring two IC chips at the same time. 3A and 3B are front views showing an embodiment of the present invention, and FIG. 4 is a partial plan view of FIG. 3. In the figure, 1... laser device, 2... condensing lens section, 3... optical axis, 4... probe, 5...
Wafer, 6... Probe card, 7... Wafer stand, 8... Holding stand, 9... Y stage, 10...
Y lead screw, 11...X motor, 12...
...X lead screw, 13...X stage, 1
4...Wafer stand lifting/lowering drive unit, 15...stand, 16...
...electrode, 17...IC chip B, 18...hole, 1
9...IC chip A.

Claims (1)

【特許請求の範囲】[Claims] 1 ウエハ台に載置された半導体ウエハに形成さ
れたICチツプの電気特性を複数個ずつ同時に測
定し、不良判定されたICチツプ面にレーザ光を
照射してマーキングを行う半導体ウエハの検査装
置において、レーザ光が前記複数個のICチツプ
の配列方向と一致する方向で且つ斜め上方から入
射するように光軸を定めたレーザ装置と、前記半
導体ウエハを垂直方向に昇降させ不良判定された
ICチツプ面と該光軸とを交差せしめるウエハ台
の昇降駆動部とを備え、不良ICチツプ面の該光
軸との交差点にマーキングを施すことを特徴とす
る半導体ウエハの検査装置。
1 In a semiconductor wafer inspection device that simultaneously measures the electrical characteristics of multiple IC chips formed on a semiconductor wafer placed on a wafer stand and marks the surface of the IC chips determined to be defective by irradiating a laser beam on the surface. , a laser device whose optical axis is set so that the laser beam is incident in a direction that coincides with the arrangement direction of the plurality of IC chips and is incident diagonally from above, and the semiconductor wafer is raised and lowered in a vertical direction, and the semiconductor wafer is determined to be defective.
What is claimed is: 1. A semiconductor wafer inspection device comprising: a lifting/lowering drive unit for a wafer stand that causes the optical axis to intersect with the IC chip surface, and marking the intersection of the defective IC chip surface with the optical axis.
JP11060780A 1980-08-12 1980-08-12 Inspection equipment of semiconductor wafer Granted JPS5735333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11060780A JPS5735333A (en) 1980-08-12 1980-08-12 Inspection equipment of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11060780A JPS5735333A (en) 1980-08-12 1980-08-12 Inspection equipment of semiconductor wafer

Publications (2)

Publication Number Publication Date
JPS5735333A JPS5735333A (en) 1982-02-25
JPS621247B2 true JPS621247B2 (en) 1987-01-12

Family

ID=14540116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11060780A Granted JPS5735333A (en) 1980-08-12 1980-08-12 Inspection equipment of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS5735333A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06250768A (en) * 1993-02-23 1994-09-09 Nec Corp Keyboard device

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0688859B2 (en) * 1988-08-09 1994-11-09 株式会社ミツトヨ Ceramic marking method
JP2858983B2 (en) * 1991-03-15 1999-02-17 山形日本電気株式会社 Semiconductor wafer probing equipment
JP2826388B2 (en) * 1991-03-18 1998-11-18 山形日本電気株式会社 Semiconductor wafer probing equipment
JP2818551B2 (en) * 1995-05-31 1998-10-30 山形日本電気株式会社 Semiconductor wafer marking equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06250768A (en) * 1993-02-23 1994-09-09 Nec Corp Keyboard device

Also Published As

Publication number Publication date
JPS5735333A (en) 1982-02-25

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