JPS60153138A - Wafer alignment mechanism of automatic prober - Google Patents

Wafer alignment mechanism of automatic prober

Info

Publication number
JPS60153138A
JPS60153138A JP921684A JP921684A JPS60153138A JP S60153138 A JPS60153138 A JP S60153138A JP 921684 A JP921684 A JP 921684A JP 921684 A JP921684 A JP 921684A JP S60153138 A JPS60153138 A JP S60153138A
Authority
JP
Japan
Prior art keywords
wafer
stage
region
chip
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP921684A
Other languages
Japanese (ja)
Inventor
Yutaka Sumino
裕 角野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP921684A priority Critical patent/JPS60153138A/en
Publication of JPS60153138A publication Critical patent/JPS60153138A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Abstract

PURPOSE:To enable the parallel lead-out working of chips in the direction of arrangement and that of a stage in the direction of movement to be performed accurately and easily by a method wherein the light source illuminating a wafer performing linear movement is reduced to a spot form. CONSTITUTION:The light source when a wafer pattern 2 on the reciprocating stage 1 is visually observed by means of a microscope and the like in order to attain theta=0 deg. is reduced to a spot form and then put into selective illumination to an extremely small region on the wafer (e.g. small to a degree that one chip of semiconductor devices formed within the wafer is included), or into irradiation of the region with a stronger light than of the other region. Focalization of this illuminated region allows no deterioration in alignment accuracy due to the blur of the tip of a probe 3. In other words, adjustment to theta=0 deg. can be made while a flow of the chip pattern linearly reciprocating within the illuminated region is observed whether to have components in the upper and lower directions.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体ウェハ上に形成された半導体装置の電気
特性を評価するためのブローμのアライメント機構に関
する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a blow μ alignment mechanism for evaluating the electrical characteristics of a semiconductor device formed on a semiconductor wafer.

〔背景技術〕[Background technology]

半導体ウェハ上にくり返し多数形成された半導体装置の
電気的測定は、第1図に示すようなxlY、Z方向に移
動可能なステージll上にウェハ12を固定し、半導体
装置の電極にプローブ13を接触させることにより行な
われる。1つのチップ測定後、ステージを下げてプロー
ブを離し、XあるいはY方向にチップのくり返し周期分
の長さだけ移動した後、再びステージを2方向に上げ、
次のチップの測定をIJfl始する。ウェハ上に多数の
チップが存在する場合には、測定→ステージ移動→測定
のくり返しを人間の手で行なうと膨大な時間を要し、ま
たチップをもれなく測定せず、未1i111是のチップ
が出る等のミスが生じやすい。したがってこれら一連の
動作はKg 1図に示したようにコントローラによりブ
ローμのステージ、駆動回路及びd+++定器を制御し
、自動的に次々と測定を行なう。この場合、ステージの
水平方向の移動は図のX方向及びY方向であるのでチッ
プの配列方向を正確にX1Y方向に合わせておかないと
、ステージが平行移動するにつれ、除々1てプローブが
半導体装置の電通パッドからずれ、測定エラーさらには
プローブで半導体装置を破損してしまう。
Electrical measurements of semiconductor devices repeatedly formed in large numbers on a semiconductor wafer are carried out by fixing the wafer 12 on a stage II movable in the x, Y, and Z directions as shown in FIG. This is done by making contact. After measuring one chip, lower the stage, release the probe, move it in the X or Y direction by the length of the chip's repetition period, and then raise the stage again in two directions.
Start measurement of the next chip IJfl. When there are a large number of chips on a wafer, it takes a huge amount of time to manually repeat measurement, stage movement, and measurement, and it also means that all chips are not measured, resulting in incomplete chips. Mistakes such as this are likely to occur. Therefore, a series of these operations is performed by controlling the blow μ stage, drive circuit, and d+++ constant meter by a controller as shown in FIG. 1, and measurements are automatically performed one after another. In this case, the horizontal movement of the stage is in the X and Y directions in the figure, so if the chip arrangement direction is not accurately aligned to the The probe may be misaligned from the conductive pad, causing measurement errors and even damaging the semiconductor device with the probe.

したがって、測定前にチップの配列方向をステージの移
動方向に正確に合わせるため、通常ステージをXあるい
はY方向に往復運動させウェハ上のパターンが流れるよ
うに見えるのを追いながらZ軸の回りにステージを回転
させて平行出しを行なう。
Therefore, in order to accurately align the chip arrangement direction with the moving direction of the stage before measurement, the stage is usually reciprocated in the X or Y direction, and the stage is rotated around the Z axis while following the pattern on the wafer as it appears to flow. Rotate to align.

)例えば第2図(・)に示すように・テージ移動方向に
対しチップの配列方向がθだけ回転しヤいたとする。X
方向に往復運動している場合には、点線で囲まれた視野
21で見ているとウェハが左から右へ動くにつれパター
ンは上から下へ移動するよブ22の配列方向とステージ
の移動方向の平行出しができたと判定できる。
) For example, as shown in FIG. 2 (), suppose that the chip arrangement direction is rotated by θ with respect to the stage movement direction. X
When the wafer is reciprocating in the direction, the pattern moves from top to bottom as the wafer moves from left to right when viewed in the field of view 21 surrounded by dotted lines. It can be determined that the parallelization of the two has been achieved.

しかしながら、この往復運動中にθ−0とする作業は視
野内で流れるパターンを追いながら行なうため、正確に
θ−0とすることカー比しく、作業に要する時間も長い
。多量のウェハを処理する場合には、この問題はさらに
顕著になる。
However, since the work of setting θ-0 during this reciprocating movement is performed while following a pattern flowing within the field of view, it takes a long time to set θ-0 accurately compared to a car. This problem becomes even more pronounced when processing a large number of wafers.

また、このθ−0とする作業は実際にはプローブの針先
を照準として往復運動するウェハを見、針先を通るパタ
ーンが上下方向に動かないようになったときにθ−0°
と判断する。
In addition, the process of setting θ-0 is actually done by observing the wafer moving back and forth with the tip of the probe as the aim, and when the pattern passing through the tip of the probe no longer moves in the vertical direction, the wafer is set to θ-0°.
I judge that.

しかるにこのとき往復運動するウェハ表面とプローブの
針先との距離は通常安全のため数100ミ212以上離
れている。従って顕微鏡等で1lAill!iLなから
θ−qとする作業を行なう場合、針先とウェハ表面の両
方に同時に焦点をあわせることができない。
However, at this time, the distance between the reciprocating wafer surface and the tip of the probe is usually several hundred micrometers or more for safety reasons. Therefore, with a microscope etc., 1lAill! When performing the operation from iL to θ-q, it is not possible to focus on both the needle tip and the wafer surface at the same time.

すなわち視野内でウェハ表面のパターンとプローブの先
端のどちらか、あるいはそれらの両方が焦点からはずれ
、ぼやけてしまいθ=0°を正確に判定することが困難
であった。
That is, either the pattern on the wafer surface or the tip of the probe, or both, are out of focus within the field of view and become blurred, making it difficult to accurately determine θ=0°.

〔発明の開示〕[Disclosure of the invention]

本発明は上記の問題点を解消し、チップの配列方向とス
テージの移動方向の平行出し作業を正確かつ容易に行な
える方法を提供するものである。
The present invention solves the above-mentioned problems and provides a method for accurately and easily aligning the chip arrangement direction and the stage movement direction.

〔構成および作用〕[Configuration and action]

すなわちθ−〇0を達成させるために顕微鏡等を用いて
往復運動するステージ上のウェハパターンを目視する際
の光源をスポット状に絞ってウェハ上の極く小さな領域
(例えばおよそウェハ内に形成された半導体装置の1チ
ツプが含まれる程度の大きさ)だけを選択的に照らすあ
るいは、他の領域よりも強い光で照射する。
In other words, in order to achieve θ-〇0, the light source used to visually observe the wafer pattern on a reciprocating stage using a microscope or the like is narrowed down to a spot, and a very small area on the wafer (e.g. approximately the area formed within the wafer) is focused. selectively illuminate only the area (large enough to include one chip of a semiconductor device) or irradiate it with stronger light than other areas.

この照らされた領域を照準とすれば、従来のようにプロ
ーブ先端とウェハ表面の距離が太き(異なるためにθ=
θ°の照準としたプローブ先端がぼやけてアライメント
精度が悪化するということがない。
If we aim at this illuminated area, the distance between the probe tip and the wafer surface is large (because of the difference, θ=
There is no possibility that the tip of the probe aimed at θ° becomes blurred and the alignment accuracy deteriorates.

すなわち、照らされた領域内で直線往復運動しているチ
ップのパターンの流れが上下方向の成分を持つかどうか
を見なからθ=08に調整することができる。広い範囲
を見ずにせいぜい1チツプの面積の視野内だけが明るく
見えるので観測中に視線があちこち散ってθ−0かどう
かの判定が困難になるということがなく、θ=0°の最
適アライメント状態を正確にかつ容易に達成できる。
In other words, it is possible to adjust θ=08 without checking whether the flow of the chip pattern that is linearly reciprocating within the illuminated area has a component in the vertical direction. Since only a field of view with an area of 1 chip at most can be seen brightly without looking at a wide area, the line of sight will not be scattered all over the place during observation and it will be difficult to judge whether θ-0 or not, and the optimal alignment for θ = 0°. states can be achieved accurately and easily.

〔効 果〕〔effect〕

本発明によりプローバへのウェハのアライメント作業が
容易にかつ正確になるので作業能率が向上し、プローブ
によりチップを損傷する可能性も減少するので測定時の
チップ歩留り低下を防ぐことができる。
The present invention makes it easier and more accurate to align the wafer to the prober, improving work efficiency, and reducing the possibility of chip damage caused by the probe, thereby preventing a drop in chip yield during measurement.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は半導体ウェハ上の多数の半導体装置の電気的測
定を示すための図、第2図(a)(b)はステージ移動
方向とチップの配列方向の違いを示すための図である。 21・・・ウェハチャック 22・・・半導体ウェハ 23・・・測定用プローブ 21・・・観測視野 22・・・配列されたチップ 28・・・半導体ウエハ 第2図 Y
FIG. 1 is a diagram showing electrical measurements of a large number of semiconductor devices on a semiconductor wafer, and FIGS. 2(a) and 2(b) are diagrams showing the difference between the stage movement direction and the chip arrangement direction. 21... Wafer chuck 22... Semiconductor wafer 23... Measurement probe 21... Observation field of view 22... Arranged chips 28... Semiconductor wafer FIG. 2 Y

Claims (1)

【特許請求の範囲】[Claims] (1)半導体ウェハを固定したステージが直線往復運動
をする間に、ウェハ」二にくり返し形成された半導体装
置の配列方向の1つがステージの直線運動方向に平行と
なるようステージを回転させてウェハのアライメントを
行なう自動ブローμにおいて、直線運動しているウェハ
を照らす光源をスポット状に絞り、前記半導体装置の配
列方向の1つをステージの直線運動方向に平行となす作
業を容易ならしめることを特徴とした自動ブローμのウ
ェハアライメント機構。
(1) While the stage on which the semiconductor wafer is fixed is linearly reciprocating, the stage is rotated so that one of the array directions of the semiconductor devices repeatedly formed on the wafer is parallel to the linear movement direction of the stage. In an automatic blow μ for performing alignment, a light source illuminating a linearly moving wafer is focused into a spot shape to facilitate the work of aligning one of the semiconductor devices parallel to the linearly moving direction of the stage. Features automatic blow μ wafer alignment mechanism.
JP921684A 1984-01-20 1984-01-20 Wafer alignment mechanism of automatic prober Pending JPS60153138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP921684A JPS60153138A (en) 1984-01-20 1984-01-20 Wafer alignment mechanism of automatic prober

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP921684A JPS60153138A (en) 1984-01-20 1984-01-20 Wafer alignment mechanism of automatic prober

Publications (1)

Publication Number Publication Date
JPS60153138A true JPS60153138A (en) 1985-08-12

Family

ID=11714251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP921684A Pending JPS60153138A (en) 1984-01-20 1984-01-20 Wafer alignment mechanism of automatic prober

Country Status (1)

Country Link
JP (1) JPS60153138A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9878083B2 (en) 2012-03-30 2018-01-30 Nikkiso Company Limited Blood purification apparatus with recognition and control means
US10195336B2 (en) 2013-11-11 2019-02-05 Nikkiso Company Limited Blood purification apparatus and priming method thereof
US10406273B2 (en) 2014-09-12 2019-09-10 Nikkiso Company Limited Blood purification apparatus
US10441699B2 (en) 2015-01-23 2019-10-15 Nikkiso Company Limited Blood purification apparatus
US10610634B2 (en) 2015-05-21 2020-04-07 Nikkiso Company Limited Blood purification apparatus
US10625007B2 (en) 2015-06-24 2020-04-21 Nikkiso Company Limited Blood purification apparatus and blood purification system
US11090419B2 (en) 2013-09-02 2021-08-17 Nikkiso Company Limited Blood purification apparatus
US11123463B2 (en) 2015-06-24 2021-09-21 Nikkiso Company Limited Blood purification apparatus

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9878083B2 (en) 2012-03-30 2018-01-30 Nikkiso Company Limited Blood purification apparatus with recognition and control means
US11090419B2 (en) 2013-09-02 2021-08-17 Nikkiso Company Limited Blood purification apparatus
US10195336B2 (en) 2013-11-11 2019-02-05 Nikkiso Company Limited Blood purification apparatus and priming method thereof
US10406273B2 (en) 2014-09-12 2019-09-10 Nikkiso Company Limited Blood purification apparatus
US10441699B2 (en) 2015-01-23 2019-10-15 Nikkiso Company Limited Blood purification apparatus
US10610634B2 (en) 2015-05-21 2020-04-07 Nikkiso Company Limited Blood purification apparatus
US10625007B2 (en) 2015-06-24 2020-04-21 Nikkiso Company Limited Blood purification apparatus and blood purification system
US11123463B2 (en) 2015-06-24 2021-09-21 Nikkiso Company Limited Blood purification apparatus

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