JPS621229B2 - - Google Patents

Abstract

An alarm timepiece produces a musical melody at a pre-set alarm time and an animated visual display in synchronism, with the melody. The timepiece includes a time counter (4) and an alarm time memory (14). The output of the time counter (4) is displayed as time information on an optical display unit (7). When the time output from the time counter (4) coincides with an alarm time stored in the alarm time memory (14), a coincidence circuit (15) generates an output to control a melody generating circuit (M), whereby the animated display on the optical display unit (7) is effected according to a note code signal generated from the melody generating circuit (M) at this time. <IMAGE>

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an alarm clock that notifies an alarm time.

Recently, alarm clocks have become known that generate a melody sound as a notification sound for the alarm time.Also, in addition to the notification sound, some alarm clocks also have an alarm display that lights up or flashes to visually display the alarm time. Some devices notify the alarm time.

However, the shape of the alarm display body is
The shape of a bell or sound symbol has a low visual effect and is often placed in one corner of the display. Not only was it difficult to distinguish it from the body, but it was also impossible to effectively recognize that the alarm time had arrived, and there was a risk of misreading or missing the display.

The present invention was developed to improve the above-mentioned situation, and its purpose is to provide an alarm clock that can effectively recognize that the alarm time has arrived.

Hereinafter, the present invention will be specifically described based on an embodiment shown in the drawings. FIG. 1 is a circuit diagram of an alarm clock to which the present invention is applied. In the figure, reference numeral 1 is an oscillator circuit that generates a reference clock signal Φ, and this reference clock signal Φ is sent to a frequency divider circuit 2 where it is frequency-divided into a signal of 1P (pulse)/1S (second). given to 3. This second counting circuit 3 counts the 1P/1S signal and outputs 1P/1S every minute.
Outputs a 1M (minute) signal and feeds it to the hour/minute counter circuit 4. This hour/minute counting circuit 4 counts the 1P/1M signals to obtain hour/minute information, and this hour/minute information is sent to the decoder 6 via the display control circuit 5, where it is decoded. After that, it is applied to the time display section 7a of the optical display device 7 and digitally displayed.

The optical display device 7 is composed of, for example, a liquid crystal display device and has a two-layer structure, and one of the display members A includes a clock display section 7a as well as an AL display section. 7b and a sound release symbol display section 7c are provided. The time display section 7a shows the hour.
A PM display section 7d is provided to display minute information, and to clearly indicate the afternoon of the display time.
The AL display section 7b clearly indicates that the time displayed on the time display section 7a is the alarm time, and the sound symbol display section 7c indicates that the alarm function is on, that is, the alarm sound is emitted at the alarm time. This clearly indicates that it will occur. Further, the other display body B is provided with an animation display section 7e that displays a display that makes it appear as if living things such as animals are moving naturally.

On the other hand, symbols S ₁ to _{S 3} are manual switches that can be operated from outside the watch, switch S ₁ is a setting switch used when setting the time, and switch S ₂ is a setting switch used when setting the time.
is a display changeover switch that causes the time display section 7a to display either the normal time or the alarm time, and switch _S3 is an on/off switch that controls the on/off state of the alarm function. These switches S ₁
~The operation signal of _S8 is sent to the corresponding one-shot circuit 8.
~10 to output a one-shot pulse signal. The one-shot pulse signal outputted from the one-shot circuit 8 is given to the setting circuit 11, and the one-shot pulse signal outputted from the one-shot circuit 9 is inputted to the tri-channel of the binary flip-flop (T-FF) 12. The pulse signal applied to the terminal T, whose output state is inverted, and further output from the one-shot circuit 10 is as follows:
It is applied to the trigger input terminal T of the T-FF 13 and inverts its output state. The setting circuit 11 is also supplied with the Q and side output signals of the T-FF 12, and if the setting switch _S1 is operated while the side output signal of the T-FF 12 is being input, the setting circuit 11 A time setting signal is output to the hour/minute counting circuit 4 to set the time.
If the setting switch _S1 is operated while the Q side output signal of the FF 12 is being input, an alarm time setting signal is output to the alarm time storage circuit 14 to set the alarm time. The alarm time information set in the alarm time storage circuit 14 is given to the display control circuit 5. The display control circuit 5 is also given the Q and side output signals of the T-FF 12, and when the side output signals of the T-FF 12 are input, the display control circuit 5 outputs the hour/minute counting circuit 4. It outputs time information, and when the Q side output signal of the T-FF 12 is input, it outputs the time information of the alarm time storage circuit 14. On the other hand, the Q-side output signal of the T-FF 12 is given to the AL display section 7b as a display drive signal, and the Q-side output signal of the T-FF 13 is given to the sound emission symbol display section 5c as a display drive signal.

The time information from both the hour/minute counting circuit 4 and the alarm time storage circuit 14 is also provided to a matching circuit 15. When this matching circuit 15 detects matching of both time information, it outputs a one-shot pulse matching signal f, and the Q-side output signal of the T-FF 13 is passed through the AND gate 16 into which it is input to the melody sound generating circuit. It is applied to the initial address generation circuit 17 of C.

Next, the configuration of the melody sound generating circuit C will be explained. The initial address generation circuit 17 provides initial address information to the address section 19 via the OR gate 18 in accordance with the input match signal f. This address section 19 outputs address information that sequentially specifies addresses in the chord storage section 20 for musical tones in accordance with input information. The data is given to the storage unit 20. The musical tone code storage section 20 is composed of, for example, a ROM (read only memory), in which various codes are stored. , volume code B, scale code C, and next address information D specifying its own next address in parallel. Further, the musical tone code storage section 20 outputs an end signal a when the generation of the melody tone is finished,
It is applied to the reset terminal R of the RS type flip-flop (RS-FF) 21 to reset it, and at the same time it is applied to the reset terminal R of the address section 19 to clear the contents of the address section 19. In addition,
The RS-FF 21 is reset by applying the output power of the AND gate 16 to its set terminal S. The tone length code A is given to the tone length control circuit 22, and an output is obtained from this tone length control circuit when a predetermined time corresponding to the tone length code A has elapsed, and the Q side output of the RS-FF 21 The signal is applied as a gate control signal to an AND gate 24 via an AND gate 23 to which the signal is input as a gate control signal. Further, the volume code B is given to a volume control circuit 25, and the scale code C is given to a scale frequency selection circuit 27 via a decoder 26. Further, the next address information D is sent to the buffer 28 and temporarily held, and then given to the address section 19 via the AND gate 24 and the OR gate 18 in sequence.
On the other hand, the reference clock signal Φ output from the oscillation circuit 1 is applied to the scale frequency generation circuit 29.
The scale frequency generation circuit 29 divides the reference clock signal Φ to generate a signal group having a frequency corresponding to each scale, and supplies the signal group to the scale frequency selection circuit 27. This selection circuit 27 is connected to the frequency generation circuit 29.
Among the signal groups output from the decoder 26, the signal corresponding to the scale decoded by the decoder 26 is selectively outputted and given to the volume control circuit 25. This volume control circuit 25 performs volume control according to the volume code B, and its output signal is given to the sound alarm device 30 to output a predetermined scale sound.

Further, the decoded information outputted from the decoder 26 is given to the animation display section 7e via the display decoder 31, and drives the animation display section 7e to display. As shown in FIG. 2, this animation display section 7e has a ladybird shape formed by combining a large number of display elements, and each display element has a corresponding display decoder 3.
One output signal is respectively given as a display drive signal.

Next, an explanation will be given of the operation of notifying the alarm time by the alarm clock configured as described above.
First, operate the on/off switch S ₃ to set T-FF.
13 is inverted, and the sound emission symbol display section 7c
Drive the lights on. With this, T-FF13
The Q side output signal of becomes “1”, and AND gate 1
6 will be deregulated.

In this state, when the alarm time is reached, the coincidence circuit 15 outputs a one-shot pulse coincidence signal f. With this, RS-FF2
1 is set, the Q side output signal becomes "1", and the AND gate 23 is released from regulation, and at the same time, initial address information is output from the initial address generation circuit 17 and given to the address section 19.
As a result, the initial address of the musical tone code storage section 20 is designated, and the tone length code A, volume code B, and scale code C for the first musical tone among the musical tones forming the melody tone are output, and the own next musical tone is output. Address information D is output. Thereby, the volume code B is given to the volume control circuit 25, and the scale code C is decoded by the decoder 26 and then given to the scale frequency selection circuit 27, so the scale frequency selection circuit 27 is sent to the decoder 26. Thus, a signal having a frequency corresponding to the decoded scale is outputted, and the volume control circuit 25 performs volume control according to the volume code B. Therefore, the tone reporting device 30 emits the first musical tone that composes the melody tone. This musical tone continues to be produced in the tone length control circuit 22 until a predetermined time period corresponding to the tone length code A has elapsed, and when an output is obtained from the tone length control circuit 22, the output signal is converted to an AND gate. and gate 2 through 23
given to 4. At this time, the next address information D read into the buffer 28 is
4 to the address section 19, the tone code storage section 20 receives the address designation from the address section 19 and is converted to the next address. Therefore, the musical tone code storage section 20 outputs various codes A, B, and C related to the second musical tone as well as the next address information D, so that the sound alarm device 30 generates the second musical tone. Thereafter, similar operations are repeated to produce melody sounds. When the generation of the melody tone is finished, an end signal a is sent from the musical tone code storage section 20.
is output, the RS-FF 21 is reset, and at the same time, the contents of the address field 19 are cleared.

On the other hand, at the same time as the generation of the melody tone starts, decoding information corresponding to the scale output from the decoder 26 is also given to the display decoder 31, so that each display element constituting the animation display section 7e displays the scale code C. The display is selectively driven according to the That is, for example, at the output timing of the scale code C for the first musical tone, a display as shown in FIG. 3 is made, and at the output timing of the scale code C for the second musical tone, a display as shown in FIG. 4 is made. is performed, and furthermore, at the output timing of the scale code C regarding the third musical note,
A display as shown in FIG. 5 is made. In this way, the pattern of the ladybug changes according to the scale code C, and a display as if the ladybug were moving naturally, that is, an animation display is performed. Note that the animation display continues to be displayed while the melody sound is being played, and as soon as the melody sound stops playing, the display disappears, and the normal time information is automatically switched and displayed on the time display section 7a. For that reason, although not shown in the diagram, the RS-
When the Q side output of the FF is obtained, the display body A may be turned off and the display body B may be displayed.

In this way, when the alarm time arrives, the melody sound is sounded and the animation display is performed at the same time, so that the user can audibly and visually recognize that the alarm time has arrived. Furthermore, since the animation display has an extremely high visual effect, there is no risk of it being mistaken for other displays or being overlooked. Moreover, the animation display moves according to the scale chord, so it is visually interesting and enjoyable.Moreover, the movement of the display can visually convey the melodies, such as light melodies, quiet slow tempo melodies, etc. I can express it.

In the above embodiment, the animation display is performed according to the scale code, but it may be performed according to the volume code or the tone length code. Furthermore, the animation display is not limited to the above embodiments, and may be any display that is visually interesting, entertaining, etc. as long as it has a high visual effect. The alarm time is not limited to the set time, but may be the hour, or may be a specific time such as a specific day or day of the week.

As described in detail above, this invention is configured to notify the alarm time by generating an alarm sound and by displaying an animation, so that it is possible to effectively notify that the alarm time has arrived. Not only can it be recognized, but it can also be visually interesting and enjoyable through animation display.

[Brief explanation of the drawing]

The drawings show one embodiment of the invention.
FIG. 2 is a circuit diagram of an alarm clock that makes extensive use of the present invention, FIG. 2 is a diagram of the construction of an animation display section, and FIGS. 3 to 5 are diagrams showing display states of the animation display section. 7... Optical display device, 7e... Animation display section, 14... Alarm time storage circuit, 15... Matching circuit, 19... Address section, 20... Musical tone code storage section, 26... Decoder, 27... Scale frequency selection circuit, 29 ... scale frequency generation circuit, 30 ... sound alarm device, 31 ... display decoder.

Claims (1)

[Claims] 1. A time counting means that obtains time information by counting reference signals, a musical tone code storage section that stores scale codes and tone length codes of melody tones, and a time counting means that obtains time information by counting reference signals, and a musical tone code storage section that stores scale codes and note length codes of melody tones, readout control means for reading out the scale code and note length code from the tone code storage section;
a melody sound generation means for generating a melody sound based on the code read out by the readout control means; an animation display section comprising a plurality of display elements; and a musical scale read out by the readout control means. An alarm clock comprising animation display control means for selectively driving the plurality of display elements to display an animation based on a code or tone length code.