JPS621225A - Semiconductor wafer - Google Patents
Semiconductor waferInfo
- Publication number
- JPS621225A JPS621225A JP14122385A JP14122385A JPS621225A JP S621225 A JPS621225 A JP S621225A JP 14122385 A JP14122385 A JP 14122385A JP 14122385 A JP14122385 A JP 14122385A JP S621225 A JPS621225 A JP S621225A
- Authority
- JP
- Japan
- Prior art keywords
- inp
- substrate
- lattice constant
- intermediate layer
- crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明はSt基板上に良質のInP単結晶を得るための
半導体ウェハ構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a semiconductor wafer structure for obtaining a high quality InP single crystal on an St substrate.
〈発明の概要〉
本発明は、St基板上にInP単結晶の成長を行う場合
、その間に中間層として、弗素化物(CaF2、BaF
z、5rFzなど)又はその混晶の絶縁性単結晶を用い
ることにより、良質のInP結晶の成長を可能としたも
のである。<Summary of the Invention> The present invention provides that when growing an InP single crystal on a St substrate, fluoride (CaF2, BaF2) is grown as an intermediate layer.
By using an insulating single crystal of InP (InP) or a mixed crystal thereof, it is possible to grow a high-quality InP crystal.
〈従来の技術〉
■−v族化合物半導体は、光学的及び電気的特性に於い
て、−■族元素半導体(Si、Ge)等では得られない
特徴を有しており、その特徴デバイスとしてLED(発
光ダイオード)、LD(レーザ・ダイオード)等のエレ
クトロ・ルミネッセンス・デバイスや高速FET、ガン
−ダイオード、ホール素子等の電子デバイスが挙げられ
る。従来、このようなデバイスは■−v族化合物半導体
(GaAss InPSGaP等)の結晶基板上にエピ
タキシャル成長等のプロセスを施して作製したものであ
シ、I−V族化合物半導体のバルク結晶が常に必要とな
る。このバルク結晶は結晶成長の困難さ等のため歩留シ
が悪く、価格としても非常に高価なものであシ、また現
在までのところ2インチ形状のものしか得られていなく
、大面積化についても困難な状態である。更に、今後、
高機能デバイスとして、三次元回路素子や機能分離型デ
バイス(信号受光部を■−■化合物が、信号処理部をS
iが受は持っているようなデバイス)の開発を考慮した
場合についても、安価で良質のSi単結晶基板上に■−
v族化合物を形成することや、更に、Stと■−v族化
合物との間に絶縁層を介して電気的に下層と上層を素子
分離することは重要な半導体素子形成技術である。<Prior art> ■-V group compound semiconductors have optical and electrical properties that cannot be obtained with -■ group element semiconductors (Si, Ge), etc., and LEDs are one of their characteristic devices. (light emitting diode), LD (laser diode), and other electroluminescent devices; and electronic devices such as high-speed FETs, Gunn diodes, and Hall elements. Conventionally, such devices have been fabricated by performing processes such as epitaxial growth on crystalline substrates of ■-V group compound semiconductors (GaAss InPSGaP, etc.), and bulk crystals of IV group compound semiconductors are always required. Become. This bulk crystal has a low yield due to the difficulty of crystal growth, is very expensive, and so far only 2-inch shapes have been obtained, and it is difficult to increase the area. is also in a difficult situation. Furthermore, in the future,
As high-performance devices, three-dimensional circuit elements and functionally separated devices (the signal receiving part is made of ■-■ compound, the signal processing part is made of S
Even when considering the development of devices such as those that i have, it is possible to
Forming a V group compound and further electrically isolating the lower layer and the upper layer through an insulating layer between the St and the -V group compound are important semiconductor element formation techniques.
本発明は上述のSi単結晶上への■−v族化合物成長法
の一手法として、多層薄膜形成を可能にするMOCVD
法又はMBE法等の各種成長法によシSi単結晶基板上
にInPのエピタキシャル成長を行うものである。The present invention employs MOCVD, which enables the formation of multilayer thin films, as a method for growing a -v group compound on the above-mentioned Si single crystal.
InP is epitaxially grown on a Si single crystal substrate by various growth methods such as the method or the MBE method.
〈発明が解決しようとする問題点〉
Si基板上にInPのエピタキシャル成長を行う場合に
は、その間に約8%の格子不整があることや単原子結晶
上に2原子化合物を成長させる問題としてアンチ7エイ
ズψドメインの発生が17、結晶成長を困難にしている
。<Problems to be solved by the invention> When epitaxially growing InP on a Si substrate, there is a lattice mismatch of about 8%, and there is a problem with anti-7 when growing a diatomic compound on a monoatomic crystal. The occurrence of AIDS ψ domains17 makes crystal growth difficult.
く問題点を解決するための手段〉
そこで、本発明では、Si基板とInPエピタキシャル
層の間に中間層として、St(格子定数5.43A)と
InP(格子定数5.87A)に格子整合を取り得る絶
縁性単結晶である(:aF2 (格子定数5.46A)
、5rFz(格子定数5.8OA)、B aF2(格子
定数6.2OA)又はその混晶Ca x B a i
−x F2、Ca xS r 1□x F 2等を用い
た積層構造を形成し、良質のInPエピタキシャル層を
形成するものである。Means for Solving the Problems> Therefore, in the present invention, lattice matching is provided between St (lattice constant 5.43A) and InP (lattice constant 5.87A) as an intermediate layer between the Si substrate and the InP epitaxial layer. It is an insulating single crystal that can be formed (:aF2 (lattice constant 5.46A)
, 5rFz (lattice constant 5.8OA), B aF2 (lattice constant 6.2OA) or its mixed crystal Ca x B a i
-xF2, CaxSr1□xF2, etc. are used to form a laminated structure to form a high quality InP epitaxial layer.
〈実施例〉 第1の実施例を第1図に示す。<Example> A first embodiment is shown in FIG.
このウェハ構造は、Si基板l上に中間層2としてSi
と格子不整合率の小さいCaFz2t (膜厚500
0〜100OOA)、更にInPとの不整合率の小さい
5rFz2z (膜厚5000〜100OOA)を形成
することにより、最終的なInP単結晶層3を得るもの
である。This wafer structure consists of Si as an intermediate layer 2 on a Si substrate l.
CaFz2t (film thickness 500
The final InP single crystal layer 3 is obtained by forming 5rFz2z (film thickness: 5000 to 100 OOA) with a small mismatch rate with InP.
また、第2図に第2の実施例を示す。Further, FIG. 2 shows a second embodiment.
Si基板11とInP成長層13との間の中間層12と
して、CaF2層121並びにCa xI Ba 1−
x IF2層122及びCaX 2B a 1−X 2
F 2層123の組成傾斜層(ただし、1>xi>x2
>0)を介して、InP13との格子整合をはかり、良
質の単結晶エピタキシャル層を得るものである。As the intermediate layer 12 between the Si substrate 11 and the InP growth layer 13, a CaF2 layer 121 and a Ca xI Ba 1-
x IF2 layer 122 and CaX 2B a 1-X 2
F2 layer 123 composition gradient layer (1>xi>x2
>0) to achieve lattice matching with InP13 and obtain a high quality single crystal epitaxial layer.
その他に、中間層構造としてCaxBa□−xF2の組
成比Xを徐々に変えて成長を行った組成傾斜層の多層膜
を用いてInPとの格子整合を可能にすることができる
。In addition, lattice matching with InP can be made possible by using a multilayer film of compositionally graded layers grown by gradually changing the composition ratio X of CaxBa□-xF2 as an intermediate layer structure.
〈発明の効果〉
以上に説明した本発明に係る中間層構造を用いることに
よりSi基板上に直接InPを形成することによっては
得られない良質のInP結晶を得ることができる。この
ような半導体ウェハ及び成長技術は、大面積で低価格の
InP基板の供給や・ 機能分割型デバイス等の複合化
デバイス実現等に於いて非常に有用となるものである。<Effects of the Invention> By using the intermediate layer structure according to the present invention described above, it is possible to obtain a high-quality InP crystal that cannot be obtained by directly forming InP on a Si substrate. Such semiconductor wafers and growth techniques will be extremely useful in supplying large-area, low-cost InP substrates, and in realizing complex devices such as functionally divided devices.
第1図及び第2図はSi基板上に形成したInP単結晶
ウェハの実施例を示す断面図である。
符号の説明
1:St単結晶基板、2:弗素化物中間層、2t: C
aFz、22 : SrF2.3:InP成長層、11
:St単結晶基板、12:弗素化物中間層、121:C
aFz、i 22 : Cax1Srl−x1F2.1
23 e CaxzS r 1−X 2 F 2.13
m InP成長層。
I−P剖人 二種↓ 舖 ↓ 愚 ヰ(l由り々)才→
ぜ!Bの17め呼?フρ弓多りの迷ケ西5百り第1図
第2図FIGS. 1 and 2 are cross-sectional views showing an example of an InP single crystal wafer formed on a Si substrate. Explanation of symbols 1: St single crystal substrate, 2: fluoride intermediate layer, 2t: C
aFz, 22: SrF2.3:InP growth layer, 11
:St single crystal substrate, 12:Fluoride intermediate layer, 121:C
aFz,i22: Cax1Srl-x1F2.1
23 e CaxzS r 1-X 2 F 2.13
m InP growth layer. I-P autopsy person 2 types ↓ ↓ stupid ヰ (l yuriri) sa →
Ze! B's 17th call? Figure 1 Figure 2
Claims (1)
F_2、BaF_2、SrF_2等の弗素化物またはそ
の混晶の絶縁性単結晶から成る中間層を有することを特
徴とする半導体ウェハ。1. Ca between the Si substrate and the InP epitaxial layer
A semiconductor wafer comprising an intermediate layer made of an insulating single crystal of a fluoride such as F_2, BaF_2, SrF_2 or a mixed crystal thereof.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14122385A JPS621225A (en) | 1985-06-26 | 1985-06-26 | Semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14122385A JPS621225A (en) | 1985-06-26 | 1985-06-26 | Semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS621225A true JPS621225A (en) | 1987-01-07 |
Family
ID=15286984
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14122385A Pending JPS621225A (en) | 1985-06-26 | 1985-06-26 | Semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS621225A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4935385A (en) * | 1988-07-22 | 1990-06-19 | Xerox Corporation | Method of forming intermediate buffer films with low plastic deformation threshold using lattice mismatched heteroepitaxy |
EP0398135A2 (en) * | 1989-05-13 | 1990-11-22 | Forschungszentrum Jülich Gmbh | Optoelectronic device |
US4994867A (en) * | 1988-07-22 | 1991-02-19 | Xerox Corporation | Intermediate buffer films with low plastic deformation threshold for lattice mismatched heteroepitaxy |
US5130269A (en) * | 1988-04-27 | 1992-07-14 | Fujitsu Limited | Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same |
US5306385A (en) * | 1992-09-15 | 1994-04-26 | Texas Instruments Incorporated | Method for generating photoluminescence emission lines from transition element doped CAF2 thin films over a Si-based substrate |
-
1985
- 1985-06-26 JP JP14122385A patent/JPS621225A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5130269A (en) * | 1988-04-27 | 1992-07-14 | Fujitsu Limited | Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same |
US5300186A (en) * | 1988-04-27 | 1994-04-05 | Fujitsu Limited | Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same |
US5484664A (en) * | 1988-04-27 | 1996-01-16 | Fujitsu Limited | Hetero-epitaxially grown compound semiconductor substrate |
US4935385A (en) * | 1988-07-22 | 1990-06-19 | Xerox Corporation | Method of forming intermediate buffer films with low plastic deformation threshold using lattice mismatched heteroepitaxy |
US4994867A (en) * | 1988-07-22 | 1991-02-19 | Xerox Corporation | Intermediate buffer films with low plastic deformation threshold for lattice mismatched heteroepitaxy |
EP0398135A2 (en) * | 1989-05-13 | 1990-11-22 | Forschungszentrum Jülich Gmbh | Optoelectronic device |
US5306385A (en) * | 1992-09-15 | 1994-04-26 | Texas Instruments Incorporated | Method for generating photoluminescence emission lines from transition element doped CAF2 thin films over a Si-based substrate |
US5552667A (en) * | 1992-09-15 | 1996-09-03 | Texas Instrument Incorporated | Apparatus and method for generating photluminescence emission lines from rare-earth-element-doped CAF2 thin films over a SI-based substrate |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9691712B2 (en) | Method of controlling stress in group-III nitride films deposited on substrates | |
KR101144466B1 (en) | Method for manufacturing nitride semiconductor crystal layer | |
JPH10321911A (en) | Method for manufacturing epitaxial layer of compound semiconductor on single-crystal silicon and light-emitting diode manufactured therewith | |
JP3184717B2 (en) | GaN single crystal and method for producing the same | |
US6967355B2 (en) | Group III-nitride on Si using epitaxial BP buffer layer | |
GB2338107A (en) | Buffer layers for semiconductor devices | |
KR20170115617A (en) | Epitaxial hexagonal material of ion beam assisted deposition textured substrate | |
JPH06105797B2 (en) | Semiconductor substrate and manufacturing method thereof | |
JPH11145514A (en) | Gallium nitride semiconductor device and manufacture thereof | |
US4789421A (en) | Gallium arsenide superlattice crystal grown on silicon substrate and method of growing such crystal | |
KR100583163B1 (en) | Nitride semiconductor and fabrication method for thereof | |
JPS621225A (en) | Semiconductor wafer | |
JP2000114599A (en) | Semiconductor light emitting element | |
CN102326228B (en) | III-nitride semiconductor growth substrate, III-nitride semiconductor epitaxial substrate, III-nitride semiconductor element, III-nitride semiconductor freestanding substrate, and method for fabricating these | |
JPS61188927A (en) | Compound semiconductor device | |
US5571321A (en) | Method for producing a gallium phosphide epitaxial wafer | |
JPH11274563A (en) | Semiconductor device and semiconductor light emitting device | |
JP4728460B2 (en) | Method for producing gallium nitride compound semiconductor single crystal | |
JP2000150388A (en) | Iii nitride semiconductor thin film and manufacture thereof | |
KR100210758B1 (en) | Epitaxial wafer and process for producing the same | |
US7195991B2 (en) | Method for producing an electromagnetic radiation-emitting semiconductor chip and a corresponding electromagnetic radiation-emitting semiconductor chip | |
JP2002151409A (en) | Semiconductor device, and method of manufacturing the same | |
JPS62222626A (en) | Semiconductor wafer | |
JPH0334531A (en) | Semiconductor substrate | |
JPS61241911A (en) | Compound semiconductor device |