JPS62121659U - - Google Patents

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Publication number
JPS62121659U
JPS62121659U JP837386U JP837386U JPS62121659U JP S62121659 U JPS62121659 U JP S62121659U JP 837386 U JP837386 U JP 837386U JP 837386 U JP837386 U JP 837386U JP S62121659 U JPS62121659 U JP S62121659U
Authority
JP
Japan
Prior art keywords
control circuit
interface
signals
data
centronics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP837386U
Other languages
Japanese (ja)
Other versions
JPH0426903Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP837386U priority Critical patent/JPH0426903Y2/ja
Publication of JPS62121659U publication Critical patent/JPS62121659U/ja
Application granted granted Critical
Publication of JPH0426903Y2 publication Critical patent/JPH0426903Y2/ja
Expired legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本案に係るインターフエース交換用ア
ダプタを示す正面図、第2図はGP―IBインタ
ーフエースコネクタのバス・ラインを接続される
内部配線構造を示す正面図、第3図イ,ロはプリ
ンタに接続されるセントロニクス準拠のインター
フエースコネクタの外観ならびに端子配列を示す
正面図および信号配置図、第4図は本案に係るア
ダプタの具体的回路構成を示す回路図、第5図は
その信号の動作タイミングを示すタイミングチヤ
ート図、第6図は従来構造を持つインターフエー
ス変換ユニツトの正面図である。 10…GP―IB・コネクタ、15…ケーブル
、20…セントロニクス・コネクタ、30…コン
バータ、31…インバータ、32…制御回路、1
01〜113…バス・ライン。
Figure 1 is a front view showing the interface replacement adapter according to the present invention, Figure 2 is a front view showing the internal wiring structure to which the bus line of the GP-IB interface connector is connected, and Figure 3 A and B are A front view and signal arrangement diagram showing the external appearance and terminal arrangement of a Centronics-compliant interface connector connected to a printer, Figure 4 is a circuit diagram showing the specific circuit configuration of the adapter according to the present invention, and Figure 5 shows the signal arrangement. A timing chart showing the operation timing, and FIG. 6 is a front view of an interface conversion unit having a conventional structure. 10...GP-IB connector, 15...cable, 20...Centronics connector, 30...converter, 31...inverter, 32...control circuit, 1
01-113...Bus line.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] GP―IB規格のインターフエースを持つ機器
(GP―IB側機器)に接続される送信側コネク
タと、この送信側コネクタにケーブルを介して接
続され、セントロニクス規格のインターフエース
を持つ機器(プリンタ)に接続される受信側コネ
クタとを備えたケーブル構造において、前記GP
―IBのデータ・ラインDIO1〜8に送られた
GP―IB側機器からの信号を前記プリンタに反
転入力させるインバータと、GP―IBの3線ハ
ンドシエイク・ラインDAV・NRFD、NDA
C各信号とセントロニクスインターフエースのS
TROBE、BUSY各信号とを入出力信号とす
る制御回路とを前記受信側コネクタの内部に設け
、データ・モードの時、前記3線ハンドシエイク
・ラインDAV、NRFD、NDAC各信号ライ
ンとSTROBE、BUSY各信号ライン間に送
受される信号で前記制御回路が動作し、該制御回
路を通してインターフエースがGP―IBからセ
ントロニクスに変換され、前記データ・ラインD
IO1〜8を通してデータ伝送がなされるように
すると共に、コマンド・モードの時、GP―IB
側のATN信号で前記制御回路を制御し、データ
・ラインDIO1〜8を通したデータ伝送が禁止
されるように構成されたインターフエース変換ア
ダプタ。
A transmitter connector that is connected to a device that has a GP-IB standard interface (GP-IB side device), and a device that is connected to this transmitter connector via a cable and has a Centronics standard interface (printer). and a receiving side connector connected to the GP.
- An inverter that inverts and inputs signals from the GP-IB side equipment sent to the data lines DIO1 to DIO8 of the IB to the printer, and three-wire handshake lines DAV, NRFD, and NDA of the GP-IB.
C Each signal and Centronics interface S
A control circuit that uses the TROBE and BUSY signals as input/output signals is provided inside the receiving connector, and when in the data mode, the 3-wire handshake line DAV, NRFD, and NDAC signal lines and the STROBE and BUSY signals are connected to each other. The control circuit is operated by signals sent and received between the signal lines, and through the control circuit, the interface is converted from GP-IB to Centronics, and the data line D
Data transmission is performed through IO1~8, and when in command mode, GP-IB
An interface conversion adapter configured to control the control circuit with an ATN signal on the side and to inhibit data transmission through the data lines DIO1 to DIO8.
JP837386U 1986-01-23 1986-01-23 Expired JPH0426903Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP837386U JPH0426903Y2 (en) 1986-01-23 1986-01-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP837386U JPH0426903Y2 (en) 1986-01-23 1986-01-23

Publications (2)

Publication Number Publication Date
JPS62121659U true JPS62121659U (en) 1987-08-01
JPH0426903Y2 JPH0426903Y2 (en) 1992-06-29

Family

ID=30792688

Family Applications (1)

Application Number Title Priority Date Filing Date
JP837386U Expired JPH0426903Y2 (en) 1986-01-23 1986-01-23

Country Status (1)

Country Link
JP (1) JPH0426903Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263139U (en) * 1988-10-28 1990-05-11

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0263139U (en) * 1988-10-28 1990-05-11

Also Published As

Publication number Publication date
JPH0426903Y2 (en) 1992-06-29

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