JPS585120U - interface circuit - Google Patents
interface circuitInfo
- Publication number
- JPS585120U JPS585120U JP9697581U JP9697581U JPS585120U JP S585120 U JPS585120 U JP S585120U JP 9697581 U JP9697581 U JP 9697581U JP 9697581 U JP9697581 U JP 9697581U JP S585120 U JPS585120 U JP S585120U
- Authority
- JP
- Japan
- Prior art keywords
- interface circuit
- parallel
- serial
- operation panel
- processing device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は操作盤と中央処理装置との接続の従来例を示す
ブロック図、第2図は本考案に係るインターフェース回
路の一実施例を示すブロック図である。
21〜25・・・・・・表示素子、31〜35・・・・
・・操作スイッチ、51・・・・・・シリアル−パラレ
ル変換器、52・・・・・・パラレル−シリアル変換器
、60・・・・・・コネクタ、61〜67・・・・・・
端子、70・・・・・・中央処理装置。FIG. 1 is a block diagram showing a conventional example of connection between an operation panel and a central processing unit, and FIG. 2 is a block diagram showing an embodiment of an interface circuit according to the present invention. 21-25...display element, 31-35...
...Operation switch, 51... Serial-parallel converter, 52... Parallel-serial converter, 60... Connector, 61-67...
Terminal, 70...Central processing unit.
Claims (2)
盤と処理装置とを接続するインターフェース回路におい
て、前記操作盤から出力されるパラレル信号をパラレル
−シリアル変換器によりシリアル信号に変換して前記処
理装置の入力とし、前記処理装置から出力されるシリア
ル信号をシリアル−パラレル変換器によりパラレル信号
に変換して前記操作盤に加えることを特徴とするインタ
ーフェース回路。(1) In an interface circuit that connects a processing device to an operation panel equipped with a large number of input means and output means, a parallel signal output from the operation panel is converted into a serial signal by a parallel-serial converter. An interface circuit that serves as an input to the processing device, converts a serial signal output from the processing device into a parallel signal using a serial-parallel converter, and applies the parallel signal to the operation panel.
用新案登録請求の範囲第(1)項記載のインク−フェー
ス回路。(2) The ink-face circuit according to claim (1), wherein the interface circuit includes a connector.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9697581U JPS585120U (en) | 1981-06-29 | 1981-06-29 | interface circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9697581U JPS585120U (en) | 1981-06-29 | 1981-06-29 | interface circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS585120U true JPS585120U (en) | 1983-01-13 |
Family
ID=29891801
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9697581U Pending JPS585120U (en) | 1981-06-29 | 1981-06-29 | interface circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS585120U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6258321A (en) * | 1985-09-07 | 1987-03-14 | Matsushita Electric Ind Co Ltd | Data converting device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5499538A (en) * | 1978-01-23 | 1979-08-06 | Nec Corp | Unit connection system |
JPS5645934B2 (en) * | 1979-10-26 | 1981-10-29 |
-
1981
- 1981-06-29 JP JP9697581U patent/JPS585120U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5499538A (en) * | 1978-01-23 | 1979-08-06 | Nec Corp | Unit connection system |
JPS5645934B2 (en) * | 1979-10-26 | 1981-10-29 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6258321A (en) * | 1985-09-07 | 1987-03-14 | Matsushita Electric Ind Co Ltd | Data converting device |
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