JPS62119656A - Address selection circuit - Google Patents

Abstract

PURPOSE:To prevent substantially generation of mis-setting or mis-connection by providing a logic circuit applying logical operation for the 2nd and 1st selection signals and outputting a selection signal to a device corresponding to a device to be selected when the 1st and 2nd selection signals are coincident. CONSTITUTION:The titled circuit consists of a decoder 1 outputting the 1st selection signal based on the address information from a microprocessor, the 2nd decoder 6 outputting the 2nd selection signal from the external information intrinsic to the device to be selected and a logic circuit detecting the coincidence between the 1st and 2nd selection signals. The output of the 1st decoder 1 deciding the address for a printed board and a selection signal obtained from an assigning signal of the printed board function externally through the 2nd decoder 2 are judged logically, its output signal uses as the address selection of the function of the printed board, then plural printed boards having the same hardware are used without modifying hardware/software to select a desired function or device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a function in a microcomputer application device or an address selection circuit for the device.

[Conventional technology]

Selection of each function or device in the microphone $2:2 monitor application device is performed by accessing the address assigned to each function or device.

For example, in a thyristor valve monitoring device used in the field of heavy electrical equipment, each digit must have the same function, such as reading the voltage signal of each thyristor element, and the data corresponding to that function is for which phase. It is necessary to determine whether

FIG. 2 is a block diagram showing a conventional example of such a selection circuit.

In the figure, 1 is a decoder, 2 and 3 are data capacitors 7a, 7 is a connection section, DB is a data bus, and AB is an address bus.

That is, the decoder 1 converts the chip select signal ((
081 to 086) are output. This output is applied to a connection 7 which selects the function or device to be selected, for example the data driver 2.3 in this example, whose corresponding position is determined by means of a switch or a bottle. They are connected as shown by the dotted lines in the figure, whereby voltage data from the thyristor valve 1 [f pressure detection device of a particular phase, for example, is input to the data cover 7a 2.3. In other words, a plurality of data capacitors 7a are provided in parallel with respect to the input data, and since it is determined in advance which phase data should be input to which data capacitor, the data capacitor 7a corresponds to the input data. It is necessary to select decoder 1, and decoder 1 is used at this time.
and the connecting portion 7. Incidentally, since the selection circuit consisting of the decoder and the connecting section is often mounted on a printed board, the selection circuit may also be simply referred to as a printed board hereinafter. Therefore, in order to select another data person's capa 7a using this printed board, it goes without saying that the predetermined position of the connection part 70 corresponding to the address signal must be connected in advance by a pin or a switch. .

[Problem that the invention seeks to solve]

That is, in the above configuration, the connection part 7
However, since this is done manually, there is a risk of incorrect settings. In addition,
Of course, it is possible to use a printed circuit board with fixed hardware to correspond to the input data, but in this case, (a) a number of printed circuit boards with different hardware would be required depending on the type of input data.

4) When a printed board fails, the same printed board is required, that is, they are not compatible.

c) Furthermore, if we discuss the implementation of printed circuit boards, proper monitoring will not be possible.

There are various problems such as: For this reason, it has been considered to use a printed board with the same specifications as shown in Figure @2, but this also leaves the above-mentioned problems.

Therefore, it is an object of the present invention to provide a selection circuit that is essentially free from setting errors and incorrect connections, and to improve its reliability.

[Means for solving problems]

a decoder that outputs a first selection signal based on address information given from the microb stomach; a second decoder that outputs a second selection signal based on information specific to the selected device given from the outside; 1st. A logic circuit for detecting a match with the second selected folded code is provided.

[Effect]

The output of the decoder (III) that determines the address of the printed board and the selection signal obtained from the signal through the decoder (second) are logically judged to assign the printed board functions given from the outside, and the function of the printed board is determined by the output signal. Multiple pieces of printed board tube hardware with the same hardware by selecting the address of It is possible to select a desired function or device using software without changing it.

〔Example〕

@1 Figure is a configuration diagram showing an embodiment of the present invention.

As is clear from the figure, this embodiment is constructed by adding a NOR gate 4, an inverter gate 5, and a decoder 6 to the one shown in FIG. Note that the Noah gate can also be replaced with an AND gate. Decoder 6
is the external input signal S, c and the signal e given to both
Accordingly, chip select signals (081 to C86) are output.

This signal e represents the type of signal possessed by the signal S, c. For example, an element voltage signal in a thyristor valve monitoring device corresponds to the signal S, c, which element (arm)
The signal e indicates whether the signal is ・The NOR gate 4 makes sure that the chip select signal selected by the decoder 1 and the chip select signal selected by the decoder 6 are both low (
"L"), a chip select signal (CS) is applied to the input buffer 2.3 via the inverter gate 5.

Table 1 shows an example address map for decoder 1, and Table 2 shows an example address map for decoder 6.

Note that Aa s Al # AIO in Table 1 indicates the @8th, 9th, and 10th bits of the address signal person, respectively.

Now, six printed boards (No.
~N0.6) If installed, this No. 1
-No. 6 The type signal e (1+ Table 1, Table 2, e1, e2, e3) from the printed board is output according to the address map as shown in Table 2, for example. At this time, suppose that the four microphone processors (not shown) access address 1000 (hexadecimal) to read U'MIO data.
Among the printed boards N011 to N006, a chip select signal is given only to the input circuit corresponding to the printed board whose input signal e is '000'', and desired data can be input thereto.Similarly. In other words, if address signal A is 1100 (1200-1500), only the printed board whose input signal e is 1'001"("010"-"101") is valid. Note that, at this time, since the Noah gate 40 condition does not hold for other printed boards, access is not performed.

In other words, by configuring the selection circuit as described above, the addresses of multiple printed circuit boards with the same specifications are determined uniaxially by each input data and its type signal C, so there is no need to make any changes to the hardware or software. It becomes possible to easily select a desired function or device using printed boards with the same specifications without having to do so.

Note that although the case where signals are inputted has been described above, the case where a plurality of signals are outputted to a plurality of devices can be performed in the same manner as described above. In addition, although the case where the printed board has one chip select signal has been described above, if multiple chip select signals are required, this can be solved by connecting another decoder to the output side of the inverter gate 5. Needless to say.

[Effect of ejection ψ]

According to this invention, in addition to a decoder that outputs a chip select signal according to an address map given to the microprocessor, a signal is added to determine the type of each signal input/output to the printed circuit board, and a signal is added to the decoder that outputs a chip select signal according to an address map given to the microprocessor. A decoder that outputs a signal is provided, and when the outputs of two decoders match, a predetermined device is selected from the printed boards containing these decoders, so printed boards with the same hardware can be used without any changes. be able to. In other words, printed boards with the same specifications can be used without any modification.
This eliminates the risk of erroneous settings and therefore provides the advantage of improved reliability.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a conventional example of an address selection circuit. Code explanation 1.6...Decoder, 2,3...Input data buffer, 4...NOR gate,
5... Inverter gate, 7... Connection section, DB... Data/(X, AB...
address bus.

Claims (1)

[Claims] a first decoder that outputs a first selection signal based on address information given from the microprocessor of the microcomputer application device; and a second decoder that outputs a second selection signal based on information specific to the selected device given from the outside. 2
a decoder, and a logic circuit for logically operating the second selection signal and the first selection signal, and outputs a selection signal to a device corresponding to the selected device when the first and second selection signals match. An address selection circuit characterized by: