JPH03191450A - Defective chip substituting circuit for memory card - Google Patents

Abstract

PURPOSE:To reduce the defective ratio of a memory card by including a stand-by memory chip in the memory card, and if a defective chip exists, substituting the stand-by memory chip for the defective chip. CONSTITUTION:When only four memory chips out of five are used and one of the four chips is defective for instance, the residual chip is used for the substitution of the defective chip. The upper two bits (A0, A1) of an address 11 are used as a memory chip selecting signal and decoded to four chip selecting signals (B3 to B0) by a decoder 1. The decoded signals are sent to a converter 2 and substitutive chip selecting signals (C4 to C6) are determined by the contents of an EEPROM 3. Since the stand-by memory chip is included in the memory card to use the stand-by chip for the substitution of a defective chip, the defec tive ratio of the memory card can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a replacement circuit for a defective chip in a memory card.

[Conventional technology]

If a conventional memory card has multiple memory chips inside, it has only the number of chips necessary for the address space allocated to the memory card.

[Problem to be solved by the invention]

The disadvantage of the conventional memory cards mentioned above is that if there is even one defective memory chip inside the card, at least the address area of that defective chip becomes unusable, and in many cases the card becomes unusable. There is.

[Means to solve the problem]

The circuit of the present invention includes a plurality of memory chips including at least one spare memory chip, a memory means for writing data indicating which of the memory chips is unusable, and a write content of the memory means and an external memory chip. and decoding conversion means for generating data indicating an alternative selection target of the memory chip in response to addressing data given from the memory chip.

〔Example〕

The present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. In the figure, only four out of five memory chips 5 to 9 are used, and if one of them is defective, the remaining one is used as a replacement for the defective chip. . The upper 2 bits of address bus 11 (Ao, A+
) are used as memory chip select signals, and decoder 1 selects four chip select signals (B3 to B
o) is decoded. This decoded signal is sent to the converter 2, and a replacement chip select signal (C4 to Co) indicating which memory chip is to be replaced is sent to the EEPR.
It is determined by the contents of the OM (a mechanically erasable read-only memory) 3.

First, the input/output truth table of the decoder 1 is shown in Table 1. When the logic value of the enable signal (EN) applied through the control signal line 12 is "1", the operation of the decoder 1 is enabled, and the operation of the EEPROM 3 is Write disabled. When the logic value of the enable signal (EN) is “0′°, decoder 1 is disabled and EEPROM 3
is enabled and given 3-bit data (nz to no) through the data bus 10 to prohibit access to the defective chip (one) and to designate a replacement chip.

The input/output relationship of converter 2 is as shown in Table 2, and E
3-bit data read from EPROM3 (n2 +
nt + no) can determine which memory chip to replace.

Table 2 For example, if memory chip 5 becomes defective, E
If (001) is written in EPROM3, four chips other than the memory chips can be used.

〔Effect of the invention〕

As described above, the present invention has the effect of reducing the failure rate of memory cards by providing a spare memory chip inside the memory card and replacing defective chips when they are present.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention. 1...Decoder, 2...Converter, 3...EEPR
OM, 4... Inverter, 5-9... Memory chip, 10... Data bus, 11... Address bus,
12...Control signal line.

Claims (1)

[Claims] a plurality of memory chips including at least one spare;
A memory means for writing data indicating which of the memory chips is unusable, and data indicating an alternative selection target of the memory chip in response to the contents written in the memory means and addressing data given from the outside. A defective chip replacement circuit for a memory card, characterized in that it is equipped with a decoding conversion means that generates a defective chip.