JPS62115832A - Forming method for mesa groove of semiconductor device - Google Patents

Forming method for mesa groove of semiconductor device

Info

Publication number
JPS62115832A
JPS62115832A JP25602385A JP25602385A JPS62115832A JP S62115832 A JPS62115832 A JP S62115832A JP 25602385 A JP25602385 A JP 25602385A JP 25602385 A JP25602385 A JP 25602385A JP S62115832 A JPS62115832 A JP S62115832A
Authority
JP
Japan
Prior art keywords
protective film
film
mesa groove
removed portion
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25602385A
Other languages
Japanese (ja)
Inventor
Masatake Okada
正剛 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP25602385A priority Critical patent/JPS62115832A/en
Publication of JPS62115832A publication Critical patent/JPS62115832A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To effectively cover a portion exposed in a mesa groove with a coating material by simultaneously etching parts of a semiconductor wafer and a protecting film to prevent the film from extending in an overhanging state. CONSTITUTION:A protecting film 2 made of silicon oxide is formed on one side surface of a semiconductor wafer 1, and processed in a photoetching step to form a protecting film removed portion 3. Then, the film 2 is coated with a photoresist 5, and a photoresist removed portion 4 is formed on a region having a width wider than that of the portion 3. The photoresist removed portion of the film 2 and a part of a semiconductor wafer 1 are simultaneously etched with a mixture of nitric acid and fluoric acid from the photoresist removed portion 4 to obtain a mesa groove 6. The groove 6 with the film 2 not extending an an overhanging state can be obtained at the film 2 by setting the thickness of the film 2 and the width of the removed portion 4.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体装置にエツチングによりメサ溝を形成
する半導体装置のメサ溝形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming a mesa groove in a semiconductor device by etching a mesa groove in a semiconductor device.

〔従来技術〕[Prior art]

一般に高耐圧の要求されるメサ型半導体素子は、一枚の
半導体ウェハーに拡散及びフォトエツチング等の工程を
経ることにより多数の半導体素子を規則的に配設し、そ
の後、各半導体素子間の選択的に保護膜を除去した部分
をエツチングすることによりメサ溝を形成し、メサ溝に
露出したPN接合部分をガラス或いはシリコンゴム等の
被覆材で被覆し、安定化させた後、個々に分割して炸裂
される。
Mesa-type semiconductor devices, which generally require high breakdown voltage, are made by regularly arranging a large number of semiconductor devices on a single semiconductor wafer through processes such as diffusion and photoetching, and then selecting between each semiconductor device. A mesa groove is formed by etching the part from which the protective film has been removed, and the PN junction exposed in the mesa groove is covered with a coating material such as glass or silicone rubber to stabilize it and then divided into individual pieces. It explodes.

従来の半導体装置のメサ溝形成方法は、第2図に示すよ
うに、半導体ウェハー11の少なくとも一方の面に酸化
珪素等の保護膜12を形成し、該保護膜12をエツチン
グにより選択的に除去した保護膜除去部13を形成し、
さらに前記保護膜除去部13よりエツチングしてメサ溝
14を得る方法である。
As shown in FIG. 2, a conventional method for forming a mesa groove in a semiconductor device involves forming a protective film 12 made of silicon oxide or the like on at least one surface of a semiconductor wafer 11, and selectively removing the protective film 12 by etching. forming a protective film removed portion 13,
Further, the mesa groove 14 is obtained by etching the protective film removed portion 13.

ところが、エツチングは半導体ウェハー11の内部を半
球状に進行するため、エツチングが保護膜除去部I3近
傍の保護膜12直下にも及ぶメサ溝14が形成されてし
まう。このため、保護膜12が庇状に張り出す形状とな
り、メサ溝に露出したPN接合部分を被覆材にて被覆す
る際に、庇状に張り出した保護膜12の直下が被覆され
難いという欠点を有していた。
However, since the etching progresses in a hemispherical manner inside the semiconductor wafer 11, a mesa groove 14 is formed in which the etching extends directly under the protective film 12 in the vicinity of the protective film removed portion I3. For this reason, the protective film 12 has a shape that protrudes like an eave, and when covering the PN junction portion exposed in the mesa groove with a covering material, there is a drawback that it is difficult to cover the area directly under the protective film 12 that protrudes like an eave. had.

〔発明の目的〕[Purpose of the invention]

本発明は、上記従来の問題点を考慮してなされたもので
あって、メサ溝を形成する際に保護膜が庇状に張り出す
ことを防止し、メサ溝に露出した部分が被覆材により確
実に被覆され得る半導体装置のメサ溝形成方法の提供を
目的とするものである。
The present invention has been made in consideration of the above-mentioned conventional problems, and it prevents the protective film from protruding like an eave when forming a mesa groove, and the exposed part of the mesa groove is covered with a covering material. It is an object of the present invention to provide a method for forming a mesa groove in a semiconductor device that can be reliably covered.

〔発明の構成〕[Structure of the invention]

本発明に係る半導体装置のメサ溝形成方法は、半導体ウ
ェハーの少なくとも一方の面に保護膜を形成し、該保護
膜をエツチングすることにより選択的に保護膜除去部を
形成し、さらに保護膜及び保護膜除去部上にレジスト層
を形成し、保護膜除去部上のレジスト層にその保護膜除
去部の幅よりも広い幅の領域にレジスト除去部を形成し
、該レジスト除去部より、レジスト除去部下の保護膜と
半導体ウェハーを同時にエツチングすることにより、保
護膜が庇状に張り出すことのないメサ溝を得ることが可
能となり、メサ溝に露出した部分の被覆が確実に行われ
るようにしたことを特徴とするものである。
A method for forming a mesa groove in a semiconductor device according to the present invention includes forming a protective film on at least one surface of a semiconductor wafer, etching the protective film to selectively form a protective film removed portion, and further forming a protective film and a protective film. A resist layer is formed on the protective film removed part, a resist removed part is formed in the resist layer on the protective film removed part in a region wider than the width of the protective film removed part, and the resist is removed from the resist removed part. By simultaneously etching the underlying protective film and the semiconductor wafer, it became possible to obtain a mesa groove in which the protective film did not protrude like an eave, and ensured that the exposed parts of the mesa groove were covered. It is characterized by this.

〔実施例〕〔Example〕

本発明の一実施例を第1図に基づいて説明すれば以下の
通りである。半導体ウェハー1の一方の面に酸化珪素か
ら成る保護H’J! 2を形成し、フォトエツチング工
程を経て、第1図(a)に示すように選択的に保護膜除
去部3を形成する。次いで、フォトレジスト5を保護膜
2上に塗布し、露光工程及び現像工程を経ることにより
、同図(b)に示すように保護膜除去部30幅よりも広
い幅の領域にフォトレジスト除去部4を形成する。その
後フォトレジスト除去部4から硝酸と弗酸の混合溶液で
、保護膜2のフォトレジストを除去された部分と半導体
ウェハー1の一部を同時にエツチングすることによりメ
サ溝6を得る。このとき、上記硝酸と弗酸の混合溶液の
エツチング速度は、保護膜2に対するエツチング速度を
1と仮定すると、半導体ウェハー1に対するエツチング
速度は10となる。そのため、半導体ウェハー1のエツ
チングが終了する間に保護膜2のフォトレジストを除去
された部分がすべてエツチングされるように、保護膜2
の厚さ及びフォトレジスト除去部4の広さを設定するこ
とにより、保護膜2が庇状に張り出すことのないメサ溝
6を得ることができる。
An embodiment of the present invention will be described below based on FIG. On one side of the semiconductor wafer 1 there is a protection H'J! made of silicon oxide. 2 is formed, and through a photo-etching process, a protective film removed portion 3 is selectively formed as shown in FIG. 1(a). Next, a photoresist 5 is applied onto the protective film 2 and subjected to an exposure process and a development process, thereby forming a photoresist removed area in an area wider than the width of the protective film removed area 30, as shown in FIG. form 4. Thereafter, the mesa groove 6 is obtained by simultaneously etching the portion of the protective film 2 from which the photoresist has been removed and a portion of the semiconductor wafer 1 using a mixed solution of nitric acid and hydrofluoric acid from the photoresist removal section 4. At this time, assuming that the etching rate of the mixed solution of nitric acid and hydrofluoric acid is 1 for the protective film 2, the etching rate for the semiconductor wafer 1 is 10. Therefore, the protective film 2 is etched so that the entire portion of the protective film 2 from which the photoresist has been removed is etched while the etching of the semiconductor wafer 1 is completed.
By setting the thickness of the photoresist removed portion 4 and the width of the photoresist removed portion 4, it is possible to obtain a mesa groove 6 in which the protective film 2 does not protrude like an eaves.

〔発明の効果〕〔Effect of the invention〕

本発明に係る半導体装置のメサ溝形成方法は、以上のよ
うに、半導体ウェハーの一部と保護膜の一部を同時にエ
ツチングすることにより保護膜が庇状に張り出すことを
防止し、メサ溝に露出した部分にガラス或いはシリコン
ゴム等の被覆材による被覆を確実に行うことができる。
As described above, the method for forming a mesa groove in a semiconductor device according to the present invention prevents the protective film from protruding like an eaves by etching a part of the semiconductor wafer and a part of the protective film at the same time. The exposed portion can be reliably covered with a covering material such as glass or silicone rubber.

これにより半導体装置の信頼性の向上を図り得るという
効果を奏する。
This has the effect of improving the reliability of the semiconductor device.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す図であって、同図(a
)は半導体ウェハーの一方の面に選択的に保護膜を形成
した状態を示す断面図、同図(b)は同図(a)の保護
膜上にフォトレジストを塗布した状態を示す断面図、同
図(C)はメサ溝形成後フォトレジストを剥離除去した
状態を示す断面図、第2図は従来例を示す断面図である
。 1は半導体ウェハー、2は保護膜、3は保護膜除去部、
4はフォトレジスト除去部、5はフォトレジスト、6は
メサ溝である。 特許出願人   シャープ株式会社 第1図(a) 第1図(b) ′$1図(C) 第2図
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG.
) is a cross-sectional view showing a state in which a protective film is selectively formed on one side of a semiconductor wafer, and FIG. FIG. 2C is a cross-sectional view showing a state in which the photoresist is peeled off after forming a mesa groove, and FIG. 2 is a cross-sectional view showing a conventional example. 1 is a semiconductor wafer, 2 is a protective film, 3 is a protective film removal part,
4 is a photoresist removal part, 5 is a photoresist, and 6 is a mesa groove. Patent applicant Sharp Corporation Figure 1 (a) Figure 1 (b) '$1 Figure (C) Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1、半導体ウェハーの少なくとも一方の面に保護膜を形
成し、該保護膜をエッチングすることにより選択的に保
護膜除去部を形成し、さらに保護膜及び保護膜除去部上
にレジスト層を形成し、保護膜除去部上のレジスト層に
その保護膜除去部の幅よりも広い幅の領域にレジスト除
去部を形成し、該レジスト除去部より、レジスト除去部
下の保護膜と半導体ウェハーを同時にエッチングするこ
とによりメサ溝を形成することを特徴とする半導体装置
のメサ溝形成方法。
1. Forming a protective film on at least one surface of the semiconductor wafer, etching the protective film to selectively form a protective film removed part, and further forming a resist layer on the protective film and the protective film removed part. , a resist removed portion is formed in a region wider than the width of the protective film removed portion in the resist layer above the protective film removed portion, and the protective film under the resist removed portion and the semiconductor wafer are simultaneously etched from the resist removed portion. A method for forming a mesa groove in a semiconductor device, the method comprising forming a mesa groove by:
JP25602385A 1985-11-15 1985-11-15 Forming method for mesa groove of semiconductor device Pending JPS62115832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25602385A JPS62115832A (en) 1985-11-15 1985-11-15 Forming method for mesa groove of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25602385A JPS62115832A (en) 1985-11-15 1985-11-15 Forming method for mesa groove of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62115832A true JPS62115832A (en) 1987-05-27

Family

ID=17286839

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25602385A Pending JPS62115832A (en) 1985-11-15 1985-11-15 Forming method for mesa groove of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62115832A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8639280B2 (en) 2004-04-13 2014-01-28 Blackberry Limited Method for a session initiation protocol push-to-talk terminal to indicate answer operating mode to an internet protocol push-to-talk network server

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8639280B2 (en) 2004-04-13 2014-01-28 Blackberry Limited Method for a session initiation protocol push-to-talk terminal to indicate answer operating mode to an internet protocol push-to-talk network server

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