JPS62114321A - High speed scanning pulse generator - Google Patents

Abstract

PURPOSE:To control optionally pulse timing by constituting a unit circuit of a reference voltage generating part and a pulse generating part, cascading plural unit circuits, providing an input terminal common to individual unit circuits. CONSTITUTION:Plural unit circuits 7 consist of a reference voltage generating power source E and pulse generating parts 5 and are cascaded. When the high level is applied to an input pulse application terminal 1, charging of capacitors 3 for electric charge storage is started through MOSFETs 2 by drain currents ID1-ID3. Currents ID1-ID3 are determined by gate voltages. The potential of each capacitor 3 reaches the threshold voltage of an inverter 4 soon. The time required for reaching is determined by the drain current ID. Consequently, the inversion timing is shifted successively in inverters 4 by the difference of currents ID, and outputs are outputted as scan pulses. Thus, the pulse generation timing is controlled by voltages and a device is driven with a low power consumption.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a high-speed scanning pulse generator that can be used in charge transfer devices and the like.

2. Description of the Related Art In recent years, there have been many requests for high-speed scanning pulse generators to be used for transfer in charge transfer devices, and there is a desire for devices that can control the transfer rate and have high speeds. When generating high-speed scanning pulses, self-scanning pulse generation circuits in which inverter circuits are connected vertically have been widely used.

Hereinafter, a conventional high-speed scanning pulse generator as described above will be explained with reference to the drawings.

FIG. 4 shows a circuit diagram of a conventional high-speed scanning pulse generator. In the figure, (4-1) is an inverter, (4-2) is an input terminal that applies input pulses, and (4-
3), the first stage output terminal (4-4) is the second stage output terminal.

FIG. 5 shows input and output waveforms when the circuit shown in FIG. 4 is operated. In the figure, the vertical axis shows voltage and the horizontal axis shows time. (5-a) is the pulse waveform of the input terminal (4-2), (5-b) is the pulse waveform of the output terminal (4-3), and (5-c) is the pulse waveform of the output terminal (4-4). It is. (t o) is the pulse delay time.

The operation of the high-speed scanning pulse generator configured as described above will be described below.

First, when a pulse waveform (5-a) is input to the input terminal (4-2), the pulse waveform (s-b) is outputted to the output terminal (4-3) after passing through two stages of the inverter (4-1). Ru. At this time, the pulse delay time (to) is determined by the inverter (4-1
) It becomes a delay time of two steps. Furthermore, the pulse passes through the next inverter (4-1) in two stages, and the pulse waveform (5-c) is output to the output terminal (4-4). -1) It will be 2 steps)
, the pulses are sequentially scanned.

Problems to be Solved by the Invention However, in the conventional configuration as described above, the pulse interval, that is, the pulse delay time (to) is determined by the inverter (4-
Determined by the delay time characteristics of 1), the inverter (4-1)
The drawback is that the pulse interval cannot be made shorter than the delay time. Also, inverter (4-1)
has the disadvantage that power consumption increases because all even or odd numbers are always in the ON state.

In view of the above drawbacks, the present invention provides a high-speed scanning pulse generator that can arbitrarily change the pulse interval, that is, the pulse delay time (t, o) without being limited by the delay time of the inverter, and can be driven with low power consumption. It provides:

Means for Solving the Problems In order to solve the above problems, the high-speed scanning pulse generator of the present invention includes a reference voltage generating section and a pulse generator whose pulse generation timing can be controlled by the reference voltage of the reference voltage generating section. A plurality of unit circuits are connected in cascade, and each unit circuit is provided with a common input terminal.

Effect: This configuration makes it possible to provide a high-speed scanning pulse generator that can arbitrarily change the pulse timing.

Further, unlike the inverter system, all odd or even numbers are not turned on, so driving with low power consumption is possible.

Embodiments Below, one embodiment of the present invention will be described with reference to the drawings.

FIG. 1 shows a schematic diagram of a high-speed scanning pulse generator according to a first embodiment of the present invention.

In the figure, (E) is a reference voltage generation power source as a base 4 voltage generation section, and (R) is a voltage dividing resistor. (1) is an input pulse application terminal serving as an input terminal.

In addition, (2) is a plurality of MOSFETs, (3) is a capacitor for charge storage, and (4) is an inverter that detects the potential of the capacitor (3) and inverts it, and these constitute a plurality of pulse generators (5). are doing. In addition, the power supply for generating voltage (
A plurality of unit circuits (7) are constituted by E) and the pulse generating section (5), and each unit circuit (7) is connected in cascade.

(Vaj ~ (Vaj is the gate voltage of each MO3FET,
V a1 = 3 R/4 R-E = 3/4, respectively.
E■σ,=2R/4R-E=1. /2E ■a,=R/4R-E=1/4E. Further, (Io,) to (ID3) are drain currents flowing into each charge storage capacitor (3), and this train current (In,) to N, I)j is generally expressed by the following equation.

Here, (β) is the gain coefficient of the transistor, (Va) is the gate voltage, (V't) is the threshold voltage of the transistor, and (Vo) is the drain voltage.

The operation of the high-speed scanning pulse generator configured as described above will be described below. First, when high is applied to the input pulse application terminal (1), MO8F E T (2)
Through the charge storage capacitor (3), the drain current (
Charging is started by Io). The current drain current (Io) is determined by each gate voltage. Eventually, the potential of each capacitor (3) reaches the threshold voltage of the inverter (4). The time (to) at this time is determined by the following equation.

Q ” to・IO・・・・(ii)(i) Formula (i
i) From formula, it becomes.

Therefore, each inverter (4) has a drain current (ID
), the timing of sequential inversion is shifted and can be output as a scanning pulse.

Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 2 shows a schematic diagram of a high-speed scanning pulse generator according to a second embodiment of the present invention.

In the figure, (2-1) is an input pulse application terminal, (2-1) is an input pulse application terminal;
-R) is the voltage dividing resistor, (E) is the base 1111! Base 4 as a pressure generating part! ! This is a power supply for voltage generation. (2-a) (
2-b) (2-c) (2-d) are output terminals, which are the same as the configuration shown in FIG.

The difference from the configuration in Figure 1 is that comparators (2-2) to (2-5) are provided as pulse generators instead of MOSFET (2), capacitor (3), and inverter (4). Yes, the unit circuit (2-
7).

FIG. 3 shows input and output pulse waveforms of the high speed scanning pulse generator according to the second embodiment of the invention shown in FIG.

In the figure, the vertical axis is voltage and the horizontal axis is time.

Vi is an input pulse waveform applied to the input pulse application terminal (2-1). (2-A) to (2-D) are output waveforms at the output terminals (2-a) to (2-d). (
2-V, ) to (Z-V2) are each comparator (2-2)
The reference voltages of ~(2-5) and (tl) to (t4) are times.

The operation of the high-speed scanning pulse generator configured as described above will be described below.

First, when a pulse Vi is applied to the input terminal (2-1),
1=1. When , the comparator (2-2) is inverted and an output like the output waveform (2-A) is generated at the output terminal (2-a). When comparator (2-3)
is inverted and an output waveform (2-B) is obtained at the output terminal (2-b), and 1=1. At this time, the comparator (2-4) is inverted and an output waveform (2-C) is obtained at the output terminal (2-c). Below, the comparator (2-5) also operates in the same way, and (2
-A) to (2-D) high-speed scanning pulses can be obtained.

As described above, according to this embodiment, the comparator (2-2
) to (2-5) by shifting the reference voltages,
Scanning pulses can be generated.

In the first embodiment, the charging time of the capacitor (3) was controlled by the drain current (Io) of the MOSFET (2), but any device may be used as long as the current can be controlled by voltage. For example, a bipolar 1 helangister can also be used.

Effects of the Invention As described above, according to the high-speed scanning pulse generator of the present invention, the pulse generation timing can be controlled by voltage, and the device can be driven with low power consumption, and its practical effects are great. There is.

[Brief explanation of drawings]

1 is a circuit diagram of a high-speed scanning pulse generator according to a first embodiment of the present invention, FIG. 2 is a circuit diagram of a high-speed scanning pulse generator according to a second embodiment of the present invention, and FIG. 3 is a circuit diagram of a high-speed scanning pulse generator according to a second embodiment of the present invention. 2
FIG. 4 is a configuration diagram of a conventional high-speed scanning pulse generator, and FIG. 5 is a waveform diagram showing pulse waveforms of each terminal of a conventional high-speed scanning pulse generator. . (E)...Group 4 + voltage generation power supply (Group 11!! Voltage generation part), (1) (2-t)...Input pulse application terminal (
input terminal), (5)...pulse generator, (2-2)~
(2-5)...Comparator (pulse generator), (7
) (2-7)...Unit circuit agent Morimoto
Yoshihiro Figure 7 ε--Power supply paddle pressure generator for generating sub-base voltage voltage (1 unit) 7--
-Pulse Rabbit〃D Mausoleum + (Input t@+) 5-11 Pulse bald? 7--Cut 'ttfr-Circuit Fig. 2 Fig. 3 t, L2t3t4 Time (j) - Fig. 4 Fig. 5 Time

Claims (1)

[Scope of Claims] 1. A unit circuit is constituted by a reference voltage generation section and a pulse generation section whose pulse generation timing can be controlled by the reference voltage of this reference voltage generation section, and a plurality of unit circuits are connected in cascade, A high-speed scanning pulse generator characterized in that each unit circuit is provided with a common input terminal. 2. The high-speed scanning pulse generator according to claim 1, wherein the reference voltage of the reference voltage generator is set sequentially with a predetermined voltage difference for each unit circuit.