JPS62114270A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To largely delete the damage of intermediate insulating film due to stepwise difference of polysilicon periphery and disconnection of aluminum wirings by forming polysilicon, then implanting <31>P<+> in high density shallow in the surface to generate density difference between the surface and the interior of the polysilicon to cover it with positive resist, and dry etching it. CONSTITUTION:A polysilicon 3 is formed through a gate oxide film 2 on an Si substrate 1. Then, <31>P<+> is implanted in high density shallow in the surface of a polysilicon 3. Then, a photolithography is executed, a positive resist 6 is patterned, and dry etched. Thus, density difference occurs between the vicinity of the surface and the interior of the polysilicon 3, and a taper 7 is formed on the side of the polysilicon 3 due to the difference of the etching rate due to the density difference. Then, an intermediate insulating film 4 and aluminum 5 are formed. Even if the film 4 and the aluminum 5 are formed, the stepwise difference of certain degree due to the taper 7 can be alleviated.

Description

Detailed Description of the Invention (Industrial Application Minute Hand) This invention creates a concentration difference between the vicinity of the poly-Si surface and the inside by shallowly and highly concentrated ion implantation of 3+P+ into the poly-Si surface, which is then applied to the resist. By etching the cover, the poly-Si is automatically tapered.
The present invention relates to a method of manufacturing a semiconductor device in which the final step shape is relaxed.

(Prior Art) Conventionally, as shown in FIG. 2, poly-Si 3 formed on a Si substrate 1 through a gate oxide film 2 has been etched by dry etching using a simple resist mask. The shape of the subsequent poly-Si3 is in the state of θ~90° as shown in FIG.
As shown in the figure, the subsequent AI distribution s5 of the intermediate insulating film 4 is
Due to the formation of , the final shape had severe steps as shown in FIG.

(Point R1I to be solved by the invention) Therefore, in part 0 of FIG.
The stress from the intermediate insulating film 4 may be damaged due to the stress from the intermediate insulating film 4, and the stress from the intermediate insulating film 4 may cause defects such as disconnection of the metal, that is, Ar1.

This invention solves the problems of the above-mentioned prior art.
The present invention provides a method for manufacturing a semiconductor device that solves problems such as damage to an intermediate insulating film and disconnection of wiring.

(Means for Solving the Problems) The present invention provides a method for manufacturing a semiconductor device in which poly-Si
After the formation of 31P+, 31P+ is shallowly implanted into the surface at a high concentration to create a concentration difference between the poly-Si surface and inside, and the poly-Si is dry-etched using the resist as a cover to create a taper in the poly-Si. This method introduces a process of forming

(Function) According to the present invention, since the above steps are introduced into the method of manufacturing a semiconductor device, 31P" is implanted shallowly and at a high concentration on the surface of poly-Si, and the vicinity of the surface of poly-Si and the inside thereof are implanted. A resist is applied on the poly-Si, and dry etching is performed using the resist as a cover. A taper can be created, thus eliminating the aforementioned problem.

(Example) Hereinafter, an example of the method for manufacturing a semiconductor device of the present invention will be described based on the drawings. Figure 1(a) to Figure 1t
el is a process explanatory diagram of one example, and this figure 1 (
In a) to FIG. 1(d), the same parts as in FIGS. 2 and 3 are designated by the same reference numerals.

This invention is used to create polycrystalline silicon electrode wiring for silicon gate MO3LSI.
As shown in a), poly-Si3 is produced on a Si substrate 1 as a semiconductor substrate through gate oxidation 192.

When generating this poly Si3, for example, the first poly Si has 3500 people and the second poly Si has about 2500 people.
D, grown in LPCvD. Next, 3IP+ is implanted shallowly into the surface of this poly-Si3 at a high concentration. In this case, for example, 40KV, dose jl
7-8 X 101sions, /d implantation. The concentration distribution at this time is as shown in FIG. 1(e). In FIG. 1(e), the horizontal axis represents the ion implantation depth d, and the vertical axis represents the concentration.

Next, as shown in FIG. 1(b), photolithography is performed, patterning is performed using a positive resist 6, and dry etching is performed. Dry etch is plasma etch, CF.

Etching is performed in the same manner as in the conventional method using gases 02 and 02.

When this dry etching is performed, the concentration difference is different between the surface area and the inside of the poly-Si3, and due to the difference in etching rate due to the concentration difference, the poly-Si3 is etched as shown in FIG. 1 (C1), and the side surface of the poly-Si3 A taper 7 is formed at .The taper 7 shown in B is confirmed to extend on both sides by about 0.3μ with respect to a 2μ square poly-Si3 pattern, for example.Therefore, a taper angle of 45° or more is obtained.

Next, in the state in which this taper 7 is formed, as shown in FIG.
As shown in dl, the intermediate insulating film 4 and A15 are formed. Even if this intermediate insulating film 4 and AI 5 are formed, the difference in level can be reduced to some extent because of the taper 7.

(Effects of the Invention) As explained in detail above, according to the present invention, polyS
After i is formed, 31p+ is shallowly implanted into the surface at a high concentration to create a concentration difference between the surface and inside of the poly-Si, and the positive resist is covered and dry etched to create a taper on the side surface of the poly-Si. Therefore, by adding only one extremely simple ion implantation step, it is possible to significantly reduce damage to the intermediate insulating film due to a step around the poly-Si and AJ disconnection.

Along with this, it greatly contributes to improving the yield of semiconductor integrated circuits.

[Brief explanation of drawings]

FIGS. 1(a) to 1(el) are process explanatory diagrams of an embodiment of the method for manufacturing a semiconductor device of the present invention, and FIG. 2 shows the shape of a conventional semiconductor device after poly-Si is dry-etched. 3 is a sectional view of a state in which an intermediate insulating film and AI are formed after dry etching the poly-Si shown in FIG. 2. 1...Si substrate, 2...gate oxide film, 3... ...Poly-Si. 4...Intermediate insulating film, 5...Aj, 6...Positive resist, 7...Taper@

Claims (1)

[Claims] Poly-Si produced on a semiconductor substrate via a gate oxide film
After the ion implantation, a positive resist pattern is formed and dry etching is performed using it as a cover. Poly S
A method for manufacturing a semiconductor device, comprising the step of forming a taper on a side surface of an i.