JPS62112142U - - Google Patents

Info

Publication number
JPS62112142U
JPS62112142U JP1985202665U JP20266585U JPS62112142U JP S62112142 U JPS62112142 U JP S62112142U JP 1985202665 U JP1985202665 U JP 1985202665U JP 20266585 U JP20266585 U JP 20266585U JP S62112142 U JPS62112142 U JP S62112142U
Authority
JP
Japan
Prior art keywords
lead
die island
convex plane
lead frame
inner lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1985202665U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985202665U priority Critical patent/JPS62112142U/ja
Publication of JPS62112142U publication Critical patent/JPS62112142U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01308Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1985202665U 1985-12-28 1985-12-28 Pending JPS62112142U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985202665U JPS62112142U (enExample) 1985-12-28 1985-12-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985202665U JPS62112142U (enExample) 1985-12-28 1985-12-28

Publications (1)

Publication Number Publication Date
JPS62112142U true JPS62112142U (enExample) 1987-07-17

Family

ID=31167263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985202665U Pending JPS62112142U (enExample) 1985-12-28 1985-12-28

Country Status (1)

Country Link
JP (1) JPS62112142U (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844858B2 (ja) * 1971-12-22 1983-10-05 株式会社日立製作所 ガソリンエンジン ノ ハイキガスジヨウカソウチ
JPS6015955A (ja) * 1983-07-08 1985-01-26 Hitachi Micro Comput Eng Ltd 半導体装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5844858B2 (ja) * 1971-12-22 1983-10-05 株式会社日立製作所 ガソリンエンジン ノ ハイキガスジヨウカソウチ
JPS6015955A (ja) * 1983-07-08 1985-01-26 Hitachi Micro Comput Eng Ltd 半導体装置

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