JPS6211005Y2 - - Google Patents
Info
- Publication number
- JPS6211005Y2 JPS6211005Y2 JP1981070335U JP7033581U JPS6211005Y2 JP S6211005 Y2 JPS6211005 Y2 JP S6211005Y2 JP 1981070335 U JP1981070335 U JP 1981070335U JP 7033581 U JP7033581 U JP 7033581U JP S6211005 Y2 JPS6211005 Y2 JP S6211005Y2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- circuit board
- sealing material
- device hole
- finger
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003566 sealing material Substances 0.000 claims description 14
- 239000008393 encapsulating agent Substances 0.000 claims description 5
- 239000011241 protective layer Substances 0.000 claims description 3
- 239000002759 woven fabric Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 239000003822 epoxy resin Substances 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920002050 silicone resin Polymers 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Wire Bonding (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【考案の詳細な説明】
本考案は、たとえば、ICまたはLSI等のチツプ
をフイルム状の回路基板に取り付けて封止材でチ
ツプを保護するようにしたチツプ実装構造に関す
る。[Detailed Description of the Invention] The present invention relates to a chip mounting structure in which, for example, a chip such as an IC or an LSI is attached to a film-like circuit board and the chip is protected with a sealing material.
従来のチツプ実装構造は、第１図ないし第３図
に示すものが知られている。以下図にもとづいて
説明すると、第１図において、回路基板１は、フ
イルム状の絶縁基板にIC等のチツプ２を挿入す
るデバイスホール３を穿設したもので、表面に導
電性のフインガ４を複数突設する。チツプ２はフ
インガ４にギヤングボンデイングされ、その上か
ら織布にエポキシ樹脂あるいはシリコン樹脂等の
封止材を含浸させたレジンシート５を被せて加熱
し、封止材をデバイスホール３内に充填させて固
化する。封止材は、チツプ２のギヤングボンデイ
ング部およびチツプ２の周辺を覆つて保護する。 Conventional chip mounting structures shown in FIGS. 1 to 3 are known. The circuit board 1 shown in FIG. 1 is a film-like insulating substrate with a device hole 3 into which a chip 2 such as an IC is inserted, and conductive fingers 4 on the surface. Install multiple protrusions. The chip 2 is giant bonded to the finger 4, and a resin sheet 5 made of a woven fabric impregnated with a sealing material such as epoxy resin or silicone resin is placed on top of the chip 2 and heated to fill the device hole 3 with the sealing material. Let it solidify. The sealing material covers and protects the large bonding portion of the chip 2 and the periphery of the chip 2.
第２図および、その−線断面図である第３
図において、回路基板６は、第１図と同様に、デ
バイスホール７にフインガ８を突設し、デバイス
ホール７にはチツプ９を挿入してフインガ８にギ
ヤングボンデイングする。フインガ８上に、樹脂
材からなる封止材層１０を印刷した後加熱して溶
解し、ギヤングボンデイング部およびデバイスホ
ール７内に封止材を充填させて固化する。 Figure 2 and Figure 3, which is a sectional view taken along the line -
In the figure, a circuit board 6 has a finger 8 protruding from a device hole 7, and a chip 9 is inserted into the device hole 7 and is bonded to the finger 8 by gang bonding, as in FIG. A sealing material layer 10 made of a resin material is printed on the finger 8 and then heated and melted, and the sealing material is filled into the gigantic bonding portion and the device hole 7 and solidified.
しかし、従来のチツプ実装構造において、前者
にあつては、レジンシート５を設置するための位
置決めがむずかしい欠点がある。一方、後者にあ
つては、封止材層１０を印刷する際に不必要な部
分のマスキング作業をするので手間がかかり、ま
た、封止材量の管理がむずかしい欠点がある。す
なわち、封止材が多過ぎると不必要な部分にまで
流れ込んでしまい、少ないとフインガの囲りの被
覆が十分でない場合が発生する。このようなこと
をなくすために封止材を適量に管理する必要があ
る。 However, in the conventional chip mounting structure, the former has the drawback that positioning for installing the resin sheet 5 is difficult. On the other hand, in the case of the latter, unnecessary portions are masked when printing the encapsulant layer 10, which is time-consuming and has the disadvantage that it is difficult to control the amount of encapsulant. That is, if there is too much sealing material, it will flow into unnecessary areas, and if there is too little, the area around the fingers may not be sufficiently covered. In order to eliminate this problem, it is necessary to control the amount of the sealing material appropriately.
本考案は、チツプの外周を囲包する大きさに形
成した封止材の枠体を、チツプに嵌めて回路基板
に溶着することにより、上記欠点を解消したチツ
プ実装構造を提供する目的にある。 The object of the present invention is to provide a chip mounting structure that eliminates the above-mentioned drawbacks by fitting a frame of sealing material formed to a size that surrounds the outer periphery of the chip onto the chip and welding it to the circuit board. .
以下に、本考案の実施例を図を参照しながらさ
らに詳述する。第４図はチツプ実装構造を示す底
面図、第５図はその−線断面図である。回路
基板２１は、ポリイミド材等のフイルム状絶縁基
板であり、デバイスホール２２を設けている。デ
バイスホール２２には、回路基板２１上に銅箔で
形成した回路部の一部であるフインガ２３を突出
し、ICまたはLSI等のチツプ２４をデバイスホー
ル２２に挿入してフインガ２３にギヤングボンデ
イングする。フイルム状の回路基板２１は、その
厚さが薄いため、デバイスホール２２に挿入した
チツプ２４は回路基板２１から突出する。そこ
で、回路基板２１から突出したチツプ２４に枠体
２５を嵌める。枠体２５は、エポキシ樹脂あるい
はシリコン樹脂等の絶縁性の封止材をたとえばガ
ラス繊維等の荒目の織布に含浸させたもので、チ
ツプ２４を囲包するように、チツプ２４の外形よ
り僅かに大きい内孔２６を有す。さらに、枠体２
５の高さは、回路基板２１に枠体２５を溶着した
際、ギヤングボンデイングしたチツプ２４の高さ
と同じになるような高さを有す。 Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings. FIG. 4 is a bottom view showing the chip mounting structure, and FIG. 5 is a cross-sectional view taken along the line -2. The circuit board 21 is a film-like insulating board made of polyimide material or the like, and is provided with a device hole 22 . A finger 23, which is a part of a circuit section formed of copper foil on the circuit board 21, is projected into the device hole 22, and a chip 24 such as an IC or LSI is inserted into the device hole 22 and bonded to the finger 23. . Since the film-shaped circuit board 21 is thin, the chip 24 inserted into the device hole 22 protrudes from the circuit board 21. Therefore, a frame 25 is fitted onto the chip 24 protruding from the circuit board 21. The frame 25 is made by impregnating a coarse woven fabric such as glass fiber with an insulating sealing material such as epoxy resin or silicone resin, and is designed to surround the chip 24 so that it has a shape smaller than the outer shape of the chip 24. It has a slightly larger inner bore 26. Furthermore, frame body 2
The height of the chip 5 is such that when the frame 25 is welded to the circuit board 21, it becomes the same as the height of the chip 24 subjected to the giant bonding.
枠体２５は、チツプ２４に嵌めて回路基板２１
上に載置した後、全体を加熱することによつて回
路基板２１に溶着し、同時に封止材の一部がデバ
イスホール２２に充填され、かつフインガ２３の
囲りを被覆する。その後、枠体２５および充填し
た封止材を固化させてチツプ２４の保護層を形成
する。 The frame body 25 is fitted onto the chip 24 and the circuit board 21
After being placed on top, the whole is heated to be welded to the circuit board 21, and at the same time, part of the sealing material fills the device hole 22 and covers the area around the finger 23. Thereafter, the frame 25 and the filled sealing material are solidified to form a protective layer for the chip 24.
従つて、本考案によれば、チツプの大きさに合
わせた枠体を回路基板に溶着するようにしたの
で、枠体は、ギヤングボンデイングされたチツプ
の位置にともなつて決定され、チツプは封止材で
確実に覆われて保護される。また、封止材の無駄
が無くなり、少量で済む。また、枠体を溶着する
際に、位置決め等の治具を必要とせず簡単に取り
付くので、手間がかからず、部品費の低減と相俟
つて全体的に安価になる。 Therefore, according to the present invention, a frame body that matches the size of the chip is welded to the circuit board, so that the frame body is determined according to the position of the chip that has been giant bonded, and the chip is Securely covered and protected with encapsulant. Further, there is no waste of sealing material, and only a small amount is required. Further, when welding the frame, the frame can be easily attached without requiring a jig for positioning, etc., so it does not take much time and the cost of parts is reduced, resulting in an overall low cost.
第１図は従来のチツプ実装構造を示す断面図、
第２図は従来の他のチツプ実装構造を示す平面
図、第３図は第２図の−線断面図、第４図は
本考案の実施例を示すチツプ実装構造の底面図、
第５図は第４図の−線断面図である。
２１……回路基板、２２……デバイスホール、
２３……フインガ、２４……チツプ、２５……枠
体、２６……内孔。
Figure 1 is a cross-sectional view showing a conventional chip mounting structure.
FIG. 2 is a plan view showing another conventional chip mounting structure, FIG. 3 is a sectional view taken along the line - - in FIG. 2, and FIG. 4 is a bottom view of the chip mounting structure showing an embodiment of the present invention.
FIG. 5 is a sectional view taken along the line -- in FIG. 4. 21... Circuit board, 22... Device hole,
23...finger, 24...chip, 25...frame, 26...inner hole.
Claims (1)
フインガを突出し、そのフインガにギヤングボン
デイングして前記デバイスホール内にチツプを挿
入し、そのチツプを保護層で被覆するチツプ実装
構造において、その保護層を、絶縁封止材を荒目
の織布に含浸させて形成し前記チツプを包囲する
ようにそのチツプに嵌め合わせて前記回路基板に
加熱溶着する枠体と、前記デバイスホール内に充
填して前記フインガのまわりを被覆する封止材と
で、それらをともに硬化させて形成してなる、チ
ツプ実装構造。 In a chip mounting structure in which a conductive finger is protruded into a device hole of a film-like circuit board, a chip is inserted into the device hole by giant bonding to the finger, and the chip is covered with a protective layer, the protective layer is A frame body formed by impregnating a coarse woven fabric with an insulating sealing material, which is fitted around the chip and heat-welded to the circuit board; A chip mounting structure is formed by curing both the encapsulant and the encapsulant surrounding the chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981070335U JPS6211005Y2 (en) | 1981-05-15 | 1981-05-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1981070335U JPS6211005Y2 (en) | 1981-05-15 | 1981-05-15 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57183756U JPS57183756U (en) | 1982-11-20 |
| JPS6211005Y2 true JPS6211005Y2 (en) | 1987-03-16 |
Family
ID=29866165
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1981070335U Expired JPS6211005Y2 (en) | 1981-05-15 | 1981-05-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6211005Y2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0747913Y2 (en) * | 1988-03-09 | 1995-11-01 | ミノルタ株式会社 | Flexible printed wiring board mounting structure |
| US7557489B2 (en) * | 2007-07-10 | 2009-07-07 | Siemens Medical Solutions Usa, Inc. | Embedded circuits on an ultrasound transducer and method of manufacture |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5333576B2 (en) * | 1972-08-09 | 1978-09-14 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5333576U (en) * | 1976-08-23 | 1978-03-24 |
-
1981
- 1981-05-15 JP JP1981070335U patent/JPS6211005Y2/ja not_active Expired
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5333576B2 (en) * | 1972-08-09 | 1978-09-14 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57183756U (en) | 1982-11-20 |
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