JPS62101065A - Integrated circuit - Google Patents

Abstract

PURPOSE:To facilitate external monitoring of the actual conditions of a plurality of measuring points in an integrated circuit during operation and eliminate the necessity of adding external terminals even if the measuring points in the integrated circuit are increased by adding at least three specific terminals to the integrated circuit. CONSTITUTION:An integrated circuit 100 is constituted by three input terminals (IN) 1, 2 and 3, two output terminals (OUT) 5 and 6, the 1st - the 4th AND gates 10-13, an OR gate 20, 1st and 2nd flip-flops (F/F) 30 and 31 of which a shift registor is composed and 1st - the 5th circuit blocks (CT) 50, 60, 70, 80 and 90 which are connected in cascade. If a set value in the 1st and the 2nd flip-flops 30 and 31 of the shift registor is varied by the input terminal 7 and the respective outputs of the 1st - the 4th circuit blocks 50, 60, 70 and 80 are selected and outputted through the OR gate 20 from the output terminal 6, the output contents of the respective circuit blocks can be monitored from outside the integrated circuit 100.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an integrated circuit, and in particular to an integrated circuit in which signal states within the integrated circuit can be measured with a small number of external terminals.

[Conventional technology]

Conventionally, the method of knowing the internal state of the integrated fi'1 circuit is as follows:
Directly collect the signal at the measurement point F1 "1 jls outside the circuit Q;
lI! The first method is to output the state of the measurement point to the microprocessor, and if the integrated circuit has a built-in microprocessor, the state of the measurement point is input manually to the microprocessor, and then There was a second method of having the microprocessor execute instructions so as to output them to external terminals of the integrated circuit.

[Problem that the invention seeks to solve]

However, although the above-mentioned first method has the advantage of directly observing the state of the measurement points, it has the disadvantage that if you want to increase the number of measurement points, you will need to increase the number of external terminals on the integrated circuit. .

In addition, in the second method, if you want to increase the number of measurement points, you only need to increase the measurement point selection conditions input to the microprocessor and change the instructions to be executed by the microprocessor, and there is no need to increase the number of external terminals. However, since the state of the internal measurement point is checked via the microprocessor, the state of the measurement point can be changed at a time interval shorter than the time it takes for the microprocessor to change the measurement point. There are two disadvantages: if the microprocessor changes, the change cannot be seen at the external terminal, and if the microprocessor malfunctions, the state of the measurement point cannot be seen at all at the external terminal. .

[Means for solving problems]

The integrated circuit of the present invention includes a shift register, a first external terminal for supplying a clock to the soft register, and a second external terminal for supplying data to the shift register.
It comprises at least a selection circuit that selects a plurality of internal measurement points determined in advance according to the contents of the shift register, and an external terminal that outputs the value of the measurement point selected by this selection circuit to the outside. and a circuit are formed on the same chip.

〔Example〕 Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 represents the internal circuitry of one embodiment of the integrated circuit of the present invention. The integrated circuit 100 shown in FIG.
NN, 2 and 3.2 output terminals (Ol, 1T) 5 and 6, 1st to 4th AND game) 10 to X3, [ll
R gate 20, first and second flip-flops (F/F) 30 and 31 constituting a shift register, and first to fifth circuit blocks (
CT) It is composed of 50.60.70.80.90.

Next, to explain the operation, this integrated circuit 100 manually inputs data from the first input terminal 1, and inputs the result of processing the data manually inputted in the first circuit block 50 to the second circuit block 60 in the subsequent stage, and similarly The results of the data processing are sequentially input to the subsequent third circuit block 70, fourth circuit block 80, and fifth circuit block 90, and the output result of the last fifth circuit block 90 is outputted to the outside from the output terminal 5. It has a structure.

If the value output from output terminal 5 is different from the expected value compared to the value manually input from first input terminal 1, it is necessary to investigate which circuit block has changed its processing operation. First, the second input terminal 2 is set to 0'', two pulses are applied to the third input terminal 3, and the first flip-flop 30 and the second flip-flop 31 of the soft register are reset. The gate of the AND gate 12 of 3 is turned on, and the second circuit block 60
The output of
It becomes possible to view the output contents from outside the integrated circuit 100. Similarly, when the second input terminal 2 is set to 1'' and one pulse is applied to the third input terminal 3, the gate of the fourth AND gate 13 is turned on, and the output of the first circuit block 50 is 13, and (1111) is outputted to the output terminal 6 through the gate 20, thereby the first
It becomes possible to view the output contents of the circuit block 50 from the outside. As described above, the values set in the first flip-flop 30 and the twenty-seventh flip-flop 31 of the shift register are changed by lr, which changes the value set in the input terminal 2, and the first circuit block 50. Second circuit block 60
．． The third circuit block 70° selects each output of the fourth circuit block 80 and passes the output terminal 6 through the 0[1 gate -20.
The output contents of each circuit block 80 can be viewed from outside the integrated circuit 100.

〔Effect of the invention〕

As explained above, according to the integrated circuit of the present invention, at least 3
By adding these terminals, it becomes possible to view the actual status of multiple predetermined measurement points inside the integrated circuit from the outside while the integrated circuit is operating.
Even if the number of measurement points inside the integrated circuit is increased, there is no need to increase the number of external terminals.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an internal circuit showing one embodiment of the present invention. 1 to 3...Input terminal 5.6...Output terminal 10 to 13...1st to 4th AND
Gate 20 ...OR gate 30
, 31... 1st. 2nd flip flop 50, 60.70.80.90...1st to 5th circuit bronc 100...Integrated circuit agent Patent attorney Yoshiyuki Iwasa Figure 1

Claims (1)

[Claims] (1) a shift register, a first external input terminal for supplying a clock to the shift register, and a second external input terminal for supplying data to the shift register;
At least a selection circuit that selects a plurality of predetermined internal measurement points according to the contents of the shift register, and an external output terminal that outputs the value at the measurement point selected by the selection circuit to the outside, An integrated circuit characterized in that these terminals and circuits are formed on the same semiconductor chip.