JPS6197944A - Formation of metal electrode - Google Patents

Formation of metal electrode

Info

Publication number
JPS6197944A
JPS6197944A JP21962484A JP21962484A JPS6197944A JP S6197944 A JPS6197944 A JP S6197944A JP 21962484 A JP21962484 A JP 21962484A JP 21962484 A JP21962484 A JP 21962484A JP S6197944 A JPS6197944 A JP S6197944A
Authority
JP
Japan
Prior art keywords
electrode
film
resist
material layer
polymer material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21962484A
Other languages
Japanese (ja)
Inventor
Yoshihisa Kawamoto
河本 芳久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP21962484A priority Critical patent/JPS6197944A/en
Publication of JPS6197944A publication Critical patent/JPS6197944A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To contrive accomplishment of excellent characteristics of a semiconductor element by a method wherein the thickness of an electrode is sufficiently secured when the electrode is formed by performing a lift-off method, and the resistance of the electrode is made smaller. CONSTITUTION:The first high molecular material layer 6 is coated on SiO2 2, a resist pattern 3 is formed thereon as the second high molecular material layer, and an etching is performed on the first high molecular material layer 6 using said resist 3 as a mask. Then, another etching is performed on the SiO2 2. An aluminum (Al) film 5 is vapor-deposited as the first metal film, the resist 3 is removed using alcohol, and the Al film 5 located on the resist 3 is removed. An Al film 7 is vapor-deposited again as the second metal film, the first high molecular material layer 6 is then removed, and the Al film 7 is also removed. The formed electrode 4 has sufficient thickness, and it has the cross-section of trapezoidal form.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は金属電極の形成方法に関するものである。[Detailed description of the invention] Industrial applications The present invention relates to a method for forming metal electrodes.

従来例の構成とその問題点 近年、半導体素子の高集積化にともない、電極も非常に
細く形成しなければならない。
Conventional Structure and its Problems In recent years, as semiconductor devices have become highly integrated, electrodes must also be formed very thin.

ここで、微細な電極形成に実用されている従来のリフト
オフ法と呼ばれる電極製造プロセスを簡単に説明する。
Here, a conventional electrode manufacturing process called the lift-off method, which is practically used to form fine electrodes, will be briefly explained.

第1図a −dは電極製造プロセスの工程順断面図であ
る。1が基板、2はS iO2。
FIGS. 1a to 1d are cross-sectional views of the electrode manufacturing process in the order of steps. 1 is the substrate, 2 is SiO2.

3はレジスト、4は電極、6は金属膜である。第1図a
はS iO22上にレジスト3の塗布、露光。
3 is a resist, 4 is an electrode, and 6 is a metal film. Figure 1a
Coating resist 3 on SiO22 and exposing.

現像を経て、レジスト3をマスクとしてS iO22の
エツチングを終了しているデバイス断面構造図である。
FIG. 3 is a cross-sectional structural view of the device after development and etching of SiO22 using the resist 3 as a mask.

第1図b −cは金属の蒸着を行ない金属膜4,5を形
成しているデバイス断面構造図である。金属蒸着過程が
進むと、レジスト3上の金属膜6がつながり、直下の開
口部の金属膜4の成長はなくなる。第1図dはレジスト
3をアルコールで除去することによってレジスト3上の
金属膜5をデバイス表面より除去して、金属膜4で配線
層を形成しているデバイス断面構造図である。
FIGS. 1b to 1c are cross-sectional structural views of a device in which metal films 4 and 5 are formed by vapor deposition of metal. As the metal vapor deposition process progresses, the metal film 6 on the resist 3 is connected, and the growth of the metal film 4 in the opening immediately below is stopped. FIG. 1d is a cross-sectional view of a device in which the metal film 5 on the resist 3 is removed from the device surface by removing the resist 3 with alcohol, and a wiring layer is formed using the metal film 4.

この従来のりフトオフ法による電極形成で金属蒸着プロ
セスをくわしく説明すると、第1図すに示すように、レ
ジスト3の側面に金属膜6が蒸着され、電極形成用のパ
ターン寸法が第1図aと比較して狭まくなっており、か
つ、電極4の断面形状は台形である。さらに第1図Cは
電極形成パタ−ンが完全に閉じた状態である。この状態
で蒸着を続行しても、電極の厚さは増加せず断面形状も
三角形である。以上のことから従来のリフトオフ法によ
るe細な電極形成では、電極断面形状が常に三角形であ
り、厚さも薄くしか形成できないことから、電接抵抗が
大きいことが欠点である。
To explain in detail the metal vapor deposition process using the conventional lift-off method for forming electrodes, as shown in FIG. It is narrower in comparison, and the cross-sectional shape of the electrode 4 is trapezoidal. Furthermore, FIG. 1C shows a state in which the electrode formation pattern is completely closed. Even if vapor deposition is continued in this state, the thickness of the electrode does not increase and the cross-sectional shape remains triangular. From the above, when forming e-thin electrodes by the conventional lift-off method, the cross-sectional shape of the electrodes is always triangular and the thickness can only be formed thin, which has the disadvantage of high electrical contact resistance.

発明の目的 本発明は、上述の従来例にみられた問題点を排し、低抵
抗金属電極を実現することができる金属電極の形成方法
を提供するものである。
OBJECTS OF THE INVENTION The present invention provides a method for forming a metal electrode that eliminates the problems seen in the above-mentioned conventional examples and can realize a low-resistance metal electrode.

発明の構成 本発明は、基板上に形成てれた下層の第1の高分子材料
層と上層の第2の高分子材料層との二層構造パターンに
第1の金属膜を蒸着形成したのち、前記第2の高分子材
料層を除去するリフトオフ工程、および、再度、第2の
金属膜を蒸着形成したのち、前記第1の高分子材料層を
除去するリフトオフ工程をそなえた金属電極の形成方法
であり、これにより、微細なパターンの金属電極が厚い
被膜で形成される。ここで、第1の金属膜と第2の金属
膜とは同一材料であっても、異なる材料であってもよく
、また、第1の高分子材料層と第2の高分子材料層とは
エツチングに顕著な違いのあるものが用いられる。
Structure of the Invention The present invention provides a method for forming a first metal film by vapor deposition on a two-layer structure pattern of a lower first polymer material layer and an upper second polymer material layer formed on a substrate. , a lift-off step of removing the second polymer material layer, and a lift-off step of removing the first polymer material layer after depositing the second metal film again. A method by which finely patterned metal electrodes are formed in a thick film. Here, the first metal film and the second metal film may be made of the same material or different materials, and the first polymer material layer and the second polymer material layer are Those with noticeable differences in etching are used.

実施例の説明 本発明の金属電極の形成方法を実施例により説明する。Description of examples The method for forming a metal electrode of the present invention will be explained using examples.

第2図a〜eは本発明の電極製造プロセスの工程順断面
図である。図の構成番号は第1図の場合と同じである。
FIGS. 2a to 2e are cross-sectional views in the order of steps of the electrode manufacturing process of the present invention. The component numbers in the figure are the same as in FIG.

また6は第1の高分子材料層である。第2図aは金属蒸
着前のデ・くイス断面構造図である。従来と異なる構造
は、S iO22上に第1の高分子材料層6を塗布し、
その上に、第2の高分子材料層として、レジストパター
ン3を形成することである。このレジスト3をマスクと
して第1の高分子材料層6のエツチングを行ない、次に
S iO22のエツチングを行なう。第2図すは第1の
金属膜として、アルミニウム(Az)膜5蒸着を行なう
プロセスである。第2図Cはレジスト3をアルコールで
除去し、レジスト3上のAt膜6を除去するプロセスで
ある。次に第2図dは、再度第2の金属膜としてのAt
膜7を蒸着を行なうプロセスである。第2図eは第1の
高分子材料層6を除去し、同第1の高分子材料6上のA
t膜アを除去するプロセスである。従来プロセスと異な
る点は、レジスト3を除去して、同レジスト3上のAt
膜5の除去後、再度、At膜7の蒸着を行ない、次に高
分子材料6を除去し、同高分子材料6上のAt膜7をリ
フトオフにより除去することである。
Further, 6 is a first polymer material layer. FIG. 2a is a cross-sectional view of the De Kuis structure before metal deposition. A structure different from the conventional one is to apply a first polymer material layer 6 on SiO22,
A resist pattern 3 is formed thereon as a second polymer material layer. Using this resist 3 as a mask, the first polymer material layer 6 is etched, and then SiO22 is etched. FIG. 2 shows a process of depositing an aluminum (Az) film 5 as the first metal film. FIG. 2C shows a process in which the resist 3 is removed with alcohol and the At film 6 on the resist 3 is removed. Next, FIG. 2d shows At as the second metal film again.
This is the process of vapor depositing the film 7. FIG. 2e shows that the first polymeric material layer 6 is removed and the A
This is the process of removing the t-film. The difference from the conventional process is that the resist 3 is removed and At
After removing the film 5, the At film 7 is deposited again, then the polymer material 6 is removed, and the At film 7 on the polymer material 6 is removed by lift-off.

本発明によって形成した電極4ば、厚さも厚く、断面形
状も台形である。この結果、電極抵抗を従来の電極と比
較して小ざくでき、デバイスの性能を向上させることが
出来る。
The electrode 4 formed according to the present invention has a large thickness and a trapezoidal cross-sectional shape. As a result, the electrode resistance can be reduced compared to conventional electrodes, and the performance of the device can be improved.

本発明の具体的な実施態様を説明する。Si基板上にS
io2を厚さ0.7μm成長させ、その上に第1の高分
子材料層として、ポリイミド・イソ・イントラ・キナジ
オン、通称、PIQと呼ばれる高分子材料を厚さ1μm
塗布した。その上に第2の高分子材料層としてポジ型レ
ジストを塗布し、露光、現像を行ない寸法0.76μm
のレジストパターンを形成した。このレジストをマスク
としてPIQを、抱水ヒドラジンとエチレンジアミンの
混合液でエツチングを行なった0この?昆合液は通称P
IQエッチャントと呼ばれる0そしてでらにSio2の
エツチングを行なった。次に厚d 0.5μ口の第1の
At蒸着を行ない、蒸着終了後、アルコールにてレジス
トを除去し、レジスト上の第10At膜を除去した。次
に再度第2のA7蒸着を厚さ0.5μm行ない、蒸着終
了後、PIQエッチャントでPIQの除去を行ないPI
Q上の第2のAt膜を除去した。以上のプロセスで81
基板上に形成したAt電極を調査した結果、従来プロセ
スで形成したA/=電極と比較して、電極幅は0.76
μm と同じであるが、電極断面積が犬きく、電極抵抗
を小さくできることを確認した。
Specific embodiments of the present invention will be described. S on Si substrate
io2 is grown to a thickness of 0.7 μm, and a polymer material called polyimide iso-intra-quinadione (commonly known as PIQ) is grown on top of the first polymer material layer to a thickness of 1 μm.
Coated. On top of that, a positive resist was applied as a second polymer material layer, exposed and developed to a size of 0.76 μm.
A resist pattern was formed. Using this resist as a mask, PIQ was etched with a mixture of hydrazine hydrate and ethylenediamine. Kongo liquid is commonly known as P
Etching of 0 and Sio2 called IQ etchant was performed. Next, a first At vapor deposition having a thickness d of 0.5 μm was performed, and after the vapor deposition was completed, the resist was removed with alcohol, and the 10th At film on the resist was removed. Next, a second A7 vapor deposition is performed again to a thickness of 0.5 μm, and after the vapor deposition is completed, the PIQ is removed using a PIQ etchant.
The second At film on Q was removed. 81 with the above process
As a result of investigating the At electrode formed on the substrate, the electrode width was 0.76 compared to the A/= electrode formed using the conventional process.
Although it is the same as μm, it was confirmed that the electrode cross-sectional area is larger and the electrode resistance can be reduced.

発明の効果 以上の様に本発明は、リフトオフ法による電極形成の際
に、電極の厚みを十分に硫体し、電極抵抗を小さくする
ことができ、半導体素子の高性能化に大きく寄与するも
のである。
Effects of the Invention As described above, the present invention makes it possible to sufficiently increase the thickness of the electrode and reduce the electrode resistance when forming the electrode by the lift-off method, which greatly contributes to improving the performance of semiconductor devices. It is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図a −dはリフトオフ法による電極製造プロセス
の工程順断面図、第2図a −eは本発明によって改善
したリフトオフ法による電極製造プロセスを示す工程順
断面図である。 1・・・・・基板、2・・・・・・S iO2,3・・
・・・・レジスト、4・・・・・・電極、5,7・・・
・・・At膜、6・・・・・・高分子材料。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図    第20
1A to 1D are step-by-step cross-sectional views of an electrode manufacturing process using a lift-off method, and FIGS. 2A-2E are step-by-step cross-sectional views showing an electrode manufacturing process using a lift-off method improved by the present invention. 1...Substrate, 2...S iO2, 3...
...Resist, 4...Electrode, 5,7...
...At film, 6...polymer material. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 20

Claims (1)

【特許請求の範囲】[Claims]  基板上に形成された下層の第1の高分子材料層と上層
第2の高分子材料層との二層構造のパターンに第1の金
属膜を蒸着したのち、前記第2の高分子材料層を除去す
るリフトオフ工程、および、再度、第2の金属膜を蒸着
したのち、前記第1の高分子材料を除去するリフトオフ
工程をそなえた金属電極の形成方法。
After depositing the first metal film on a two-layer pattern of a lower first polymer material layer and an upper second polymer material layer formed on the substrate, the second polymer material layer is deposited. A method for forming a metal electrode, comprising a lift-off step of removing the first polymer material, and a lift-off step of removing the first polymer material after depositing the second metal film again.
JP21962484A 1984-10-19 1984-10-19 Formation of metal electrode Pending JPS6197944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21962484A JPS6197944A (en) 1984-10-19 1984-10-19 Formation of metal electrode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21962484A JPS6197944A (en) 1984-10-19 1984-10-19 Formation of metal electrode

Publications (1)

Publication Number Publication Date
JPS6197944A true JPS6197944A (en) 1986-05-16

Family

ID=16738443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21962484A Pending JPS6197944A (en) 1984-10-19 1984-10-19 Formation of metal electrode

Country Status (1)

Country Link
JP (1) JPS6197944A (en)

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