JPS6197895A - Hybrid ic device - Google Patents
Hybrid ic deviceInfo
- Publication number
- JPS6197895A JPS6197895A JP21901784A JP21901784A JPS6197895A JP S6197895 A JPS6197895 A JP S6197895A JP 21901784 A JP21901784 A JP 21901784A JP 21901784 A JP21901784 A JP 21901784A JP S6197895 A JPS6197895 A JP S6197895A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- circuit device
- wiring board
- printed wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Combinations Of Printed Boards (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、混成集積回路装置の構造に関するものである
。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a hybrid integrated circuit device.
混成集積回路装置は、一般に、いわゆる厚膜技術によっ
て抵抗素子・容量素子等を形成した回路基板上に、半導
体素子その他の搭載部品を接続し、適尚な外装を施して
４成されるものであるが、近年、回路の大規模化に伴い
、大型の回路基板が用いられることが多くなった。A hybrid integrated circuit device is generally constructed by connecting semiconductor elements and other mounted components onto a circuit board on which resistive elements, capacitive elements, etc. are formed using so-called thick film technology, and applying an appropriate exterior. However, in recent years, with the increase in the scale of circuits, large circuit boards are increasingly being used.
従来、この種の混成集積回路装置は、例えば第４図及び
第５図に示すように、アルミナセラミック基板上に厚膜
技術または薄膜技術により抵抗素子・容量素子等を形成
した回路基板１１上に半導体素子その他の搭載部品１３
ａ、１３ｂを接続し、外部端子１４ａ、１４ｂ、１４ｃ
を導出し、モールドケース１５中に樹脂１６で封入した
混成集積回路装置１７でちる。Conventionally, this type of hybrid integrated circuit device has been constructed on a circuit board 11 in which resistive elements, capacitive elements, etc. are formed on an alumina ceramic substrate by thick film technology or thin film technology, as shown in FIGS. 4 and 5, for example. Semiconductor elements and other mounted parts 13
a, 13b, external terminals 14a, 14b, 14c
A hybrid integrated circuit device 17 sealed in a resin 16 in a mold case 15 is used.
このような構造の混成集積回路装置をプリント配線板に
実装した場合、このプリント配線板が変形すると混成集
積回路装置に大きな力が作用することがある。即ち第６
図（ａ）に示すように、プリント配線板１８が平担な状
態で混成集積回路装置１７の端子１４ａ、１４ｂ、１４
ｃ、・・・がはんだ付は固定された後、同図中）に示す
ようにプリント配線板１８が変形すると、図に示す両端
付近の端子には導出方向に引張応力が、中央付近の端子
には圧縮応力が発生する。応力の大きさは弾性係数とひ
ずみ量の積に比例するが、一般に混成集積回路装置１７
を構成する回路基板１１や端子１４の弾性係数は大きい
ので応力も大きく、甚だしい場合は端子１４とプリント
配線板１８との接続点の破壊又は混成集積回路装置１７
自身の破壊に至ることがある。特に回路基板１１が大き
い場合は、プリント配線板の変形曲率が同じでもひずみ
量が大きくなり、注意が必要である。When a hybrid integrated circuit device having such a structure is mounted on a printed wiring board, if the printed wiring board is deformed, a large force may act on the hybrid integrated circuit device. That is, the sixth
As shown in Figure (a), the terminals 14a, 14b, 14 of the hybrid integrated circuit device 17 are
When the printed wiring board 18 deforms as shown in the same figure after soldering is fixed, tensile stress is applied to the terminals near both ends shown in the figure in the lead-out direction, and tensile stress is applied to the terminals near the center as shown in the figure. compressive stress occurs. The magnitude of stress is proportional to the product of the elastic modulus and the amount of strain;
Since the elastic modulus of the circuit board 11 and the terminals 14 that make up the circuit board 11 and the terminals 14 is large, the stress is also large, and in extreme cases, the connection point between the terminals 14 and the printed wiring board 18 may be destroyed or the hybrid integrated circuit device 17 may be damaged.
It may lead to its own destruction. Particularly when the circuit board 11 is large, the amount of strain will be large even if the deformation curvature of the printed wiring board is the same, so care must be taken.
本発明は、このよつな事情に基づいてなされたもので、
応力を緩和して破壊を防ぐ構造の混成集積回路を提供す
ることを目的としている。The present invention was made based on these circumstances,
The objective is to provide a hybrid integrated circuit with a structure that relieves stress and prevents destruction.
本発明の混成集積回路装置は、その回路基板を複数に分
割し該基板間を接続線で接続することにより可掲性を持
上せた複合回路基板を用い九ことを特徴としている。The hybrid integrated circuit device of the present invention is characterized in that it uses a composite circuit board that is divided into a plurality of parts and connected between the boards with connection lines to improve postability.
以下、本発明を実施例により説明する。 Hereinafter, the present invention will be explained by examples.
本発明の一実施例は、第１図及び第２図に示すように、
アルミナセラミック基板上に厚膜技術又は薄膜技術によ
シ抵抗素子・容量素子等を形成した２枚の回路基板１ａ
、ｌｂ間を接続線２ａ、λｂ。One embodiment of the present invention, as shown in FIGS. 1 and 2,
Two circuit boards 1a in which resistive elements, capacitive elements, etc. are formed on alumina ceramic substrates by thick film technology or thin film technology.
, lb are connected by connecting lines 2a and λb.
２ｃ、・・・で必要な相互接続を形成し、半導体素子そ
の他の搭載部品３ａ、３ｂを接続し、外部端子４ａ、４
ｂ、４Ｃ，・・・を導出し、モールドケース５中に可撓
性樹脂６で封入した混成集積回路装置７でちる、２枚の
回路基板１ａ、ｌｂは、基板の可撓性を持たせる為に分
割したもので、接続線２ａ。2c, . . . to form necessary interconnections, connect semiconductor elements and other mounted components 3a, 3b, and connect external terminals 4a, 4.
b, 4C, . The connection line 2a is divided for this reason.
２ｂ、２ｃ、・・・によ多回路的には一枚の回路基板と
等価な複合回路基板となる０
このような構造の混成集積回路装置をプリント配線板に
実装し九場合は、このプリント配線板が変形しても混成
集積回路装置にかかる応力は著しく軽減される。即ち、
第３図（ａ）に示すように、プリント配線板８が平担な
状態で混成集積回路装置７の端子４ａ、４ｂ、４ｃ、・
・・がはんだ付は固定された後、同図（ｂ）に示すよう
にプリント配線板８ うか変形しても、回路
基板１ａ、ｌｂ間は接続線２部分で容易に折れ曲が９、
回路基板１ａ、ｌｂを一体と見比時の等測的な弾性係数
が小さくなり、混成集積回路装置ヱに加わる応力は著し
く軽減される。この時樹脂６は可撓性のあるものを選び
、基板１ａ、ｌｂ間の可撓性を防げない配ｙＩ１．をす
る。2b, 2c, . . . When a hybrid integrated circuit device with such a structure is mounted on a printed wiring board, it becomes a composite circuit board that is equivalent to a single circuit board in terms of multiple circuits. Even if the wiring board is deformed, the stress applied to the hybrid integrated circuit device is significantly reduced. That is,
As shown in FIG. 3(a), when the printed wiring board 8 is flat, the terminals 4a, 4b, 4c, .
Even if the printed wiring board 8 is deformed after the soldering is fixed, the connection wire 2 between the circuit boards 1a and lb will easily bend 9.
When the circuit boards 1a and 1b are considered as one body, the isometric elastic modulus is reduced, and the stress applied to the hybrid integrated circuit device is significantly reduced. At this time, the resin 6 is selected to be flexible, and the arrangement yI1 that does not prevent flexibility between the substrates 1a and lb. do.
以上の如く、本発明によればプリント配線板の変形に対
して混成集積回路装置に発生する応力を著しく緩和でき
るので、特に大型の回路基板を使用する混成集積回路装
置において端子接続の破壊又は混成集積回路装置自身の
破壊を防ぐのに極めて有益でちる。As described above, according to the present invention, the stress generated in the hybrid integrated circuit device due to the deformation of the printed wiring board can be significantly alleviated. This is extremely useful in preventing damage to the integrated circuit device itself.
なお、上述の実施例では回路基板を１ａおよび１ｂの２
枚に分割して構成した場合について述べたが、必要に応
じて３枚以上に分割して応力緩和の効果をさらに高める
ことも可能でちる。In addition, in the above-mentioned embodiment, two circuit boards 1a and 1b are used.
Although the case where the structure is divided into two sheets has been described, it is also possible to further enhance the effect of stress relaxation by dividing the structure into three or more sheets, if necessary.
第１図は本発明の混成集積回路装置の実施例の主要部分
を示す斜視図、第２図は該装置の部分断面図、第３図（
ａ） 、 （ｂ）は該装置の印刷配線板への実装後の変
形を示す部分断面図である。また第４図は従来の混成集
積回路装置の一例の主要部分を示す斜視図、第５図は該
装置の部分断面図、第６図（ａ） ｌ （ｂ）は該装置
の印刷配線板への実装後の菱形を示す部分断面図である
。
なお、図において、１ａ、１ｂ、１１・・・・・・回路
基板、２ａ 、２ｂ 、２ｃｍ・・−・・接続線、３ａ
、３ｂ。
１３ ａ 、 ｌ ３ ｂ・−−−−−搭載部品、４
ａ 、 ４ ｂｒ ４ ｃｒ１４ａ、１４ｂ、１４ｃｍ
・・・・・外部端子、５，１５・・・・・・モールドケ
ース、６．１６・・・・・・樹脂、７，１７・・・・・
・混成集積回路装置、８，１８・・・・・・印刷配線板
、でちる。
＃４ 凹
／ａ １４ａ ｔｕｂ １４Ｃ
第６ 目に）
第５ 凹
第６図（ｂ）FIG. 1 is a perspective view showing the main parts of an embodiment of the hybrid integrated circuit device of the present invention, FIG. 2 is a partial sectional view of the device, and FIG.
a) and (b) are partial cross-sectional views showing deformation of the device after it is mounted on a printed wiring board. 4 is a perspective view showing the main parts of an example of a conventional hybrid integrated circuit device, FIG. 5 is a partial sectional view of the device, and FIG. FIG. 3 is a partial cross-sectional view showing a rhombus after being mounted. In the figure, 1a, 1b, 11... circuit board, 2a, 2b, 2cm... connection wire, 3a
, 3b. 13a, l3b・----Mounted parts, 4
a, 4 br 4 cr14a, 14b, 14cm
...External terminal, 5,15...Mold case, 6.16...Resin, 7,17...
・Hybrid integrated circuit device, 8, 18...Printed wiring board, dechiru. #4 concave/a 14a tube 14C 6th) 5th concave Fig. 6 (b)
Claims (1)
ことにより可撓性を持たせた複合回路基板を用いたこと
を特徴とする混成集積回路装置。A hybrid integrated circuit device characterized by using a composite circuit board that is made flexible by dividing the circuit board into a plurality of parts and connecting the boards with connection lines.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21901784A JPS6197895A (en) | 1984-10-18 | 1984-10-18 | Hybrid ic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21901784A JPS6197895A (en) | 1984-10-18 | 1984-10-18 | Hybrid ic device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6197895A true JPS6197895A (en) | 1986-05-16 |
Family
ID=16728946
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21901784A Pending JPS6197895A (en) | 1984-10-18 | 1984-10-18 | Hybrid ic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6197895A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007026945A1 (en) * | 2005-08-31 | 2007-03-08 | Sanyo Electric Co., Ltd. | Circuit device and method for manufacturing same |
-
1984
- 1984-10-18 JP JP21901784A patent/JPS6197895A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2007026945A1 (en) * | 2005-08-31 | 2007-03-08 | Sanyo Electric Co., Ltd. | Circuit device and method for manufacturing same |
| US7935899B2 (en) | 2005-08-31 | 2011-05-03 | Sanyo Electric Co., Ltd. | Circuit device and method of manufacturing the same |
| JP5378683B2 (en) * | 2005-08-31 | 2013-12-25 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | Circuit device and manufacturing method thereof |
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