JPS6190596A - Field delay device - Google Patents

Abstract

PURPOSE:To clamp effectively without giving influences to a reproducing screen and to prevent fluctuation of the pedestal level by clamping a field-delayed video signal at the timing immediately after the burst signal in the blanking period of the video signal. CONSTITUTION:A removing means 8 composed of an input switch 3, a switch control circuit 5 and a synchronous separating circuit 7 outputs a video signal which removes a synchronous signal S' from a compound video signal A. A field memory 4 outputs a video signal with one field delay by a transfer clock B from a transfer clock generating circuit 9 generated based upon the synchronous signal from the synchronous separating circuit 7. In the delay video signal, a clock is removed by a low-pass filter 10, becomes a delay video signal C and is inputted to a clamp circuit 11. To the clamp circuit 11, a clamp pulse D is given from a synchronous signal generating circuit 12, and the delay video signal is clamped at the clamp circuit 11 in response to the clamp pulse at the timing immediately after a burst signal S in the blanking period.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to the reproduction of a still image by recording a single field recorded as uneven capacitance changes or magnetically on a recording medium such as a video disk. The present invention relates to a field delay device for delaying the same composite video signal by one field or more, and more particularly to a technique for clamping the pedestal level of the delayed video signal.

<Prior Art> Such a field delay device is generally used in a video disc player, etc. In such a video disc player, etc., the field delay device is used to manually record composite video including synchronization signal periods of the same field. Some devices delay the signal, repeatedly output the delayed composite video signal, and thereby perform still playback. On the other hand, in order to reduce the required number of delay elements in the field delay device to make it more cost-effective, or to improve the color i1 rendition of still images, it is possible to In some cases, the synchronization signal period is removed. Although the latter method has such advantages, it also has the disadvantage that, like the former method, fluctuations occur in the pedestal level of the delayed video signal, which causes flickering in still images. .

In order to eliminate this drawback, point 9. One idea is to clamp the pedestal level so that it does not fluctuate, but generally such ramping is done within the synchronization signal period, and in the video signal from which the synchronization signal period is removed,
In this way, the lamp is not used.

<Object of the Invention> The present invention has been made in view of the above-mentioned points, and an object of the present invention is to effectively clamp a field-delayed video signal without affecting the playback screen.

<Structure of the Invention> In order to achieve the above-mentioned object, the present invention includes a removing means for removing a synchronization signal period from a composite video signal, field-delaying the video signal from the removing means, and outputting this as a delayed video signal. a clamp circuit that clamps the field-delayed video signal from the field memory at a timing immediately after the burst signal within the blanking period of the video signal, and generates a synchronization signal phase-locked to the composite video signal. It includes a synchronization signal generation circuit and a synchronization signal processing circuit that adds the synchronization signal to the delayed video signal.

<Example> Hereinafter, an example of the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram of one embodiment of the present invention.

In the figure, reference numeral 1 denotes a clamp circuit for fixing the level of the composite video signal from the input terminal 2, and the synchronization signal S shown in FIG. 2(A) is clamped by this clamp circuit 1.

The composite video signal containing the video signal is input to the field memory 4 via the manual switch 3. This field memory 4 is composed of analog delay elements.

The human switch 3 is configured to be operated in response to a control signal from a switch control circuit 5. The switch control circuit 5 is set to an operating state by a command signal from an input terminal 6, and in this operating state outputs the control signal by a synchronization signal from a synchronization separation circuit 7. By switching the switch 3, the video signal excluding the synchronization signal period is stored in the field memory 4. In other words, these input switches 3,
A removing means 8 comprising a switch control circuit 5 and a synchronization separation circuit 7 outputs a video signal obtained by removing the synchronization signal period, that is, the synchronization signal S° from the composite video signal shown in FIG. 2(A).

The field memory 4 delays the video signal by one field by the transfer lock shown in the second eW (B) from the transfer lock generation circuit 9, which is generated based on the synchronization signal from the synchronization separation circuit 7. is output as a delayed video signal.

The delayed video signal from the 1FI field memory 4 is
The clock is removed by the low-pass filter IO as shown in Figure 2 (
The delayed video signal shown in C) is further input to the clamp circuit 11. This clamp circuit jl has
A clamp pulse shown in FIG. 2(D) is applied from the synchronization signal generation circuit 12. As shown in FIG. 2, this clamp pulse becomes high level at the timing immediately after the burst signal S within the blanking period of the video signal, and the clamp circuit 11 responds to the ramp pulse.
Is the delayed video signal immediately after the burst signal S within the blanking period of the video signal? Clamped at the timing.

As described above, in the present invention, clamping is performed immediately after the burst signal, S, during the input period of the video signal and during the period that does not affect the video signal, that is, within the blanking period of the delayed video signal. Therefore, clamping can be performed effectively without affecting the playback screen, and fluctuations in the pedestal level can be prevented.

The delayed video signal clamped by the clamp circuit 11 is
The synchronizing signal processing circuit 13 adds phase-locked horizontal and vertical synchronizing signals S° to the composite video signal from the synchronizing signal generating circuit 12, as shown in FIG. 2(E). A delayed video signal is output so that the

The delayed video signal from the synchronous signal processing circuit 13 is amplified by the amplifier 14 so that the video level at the input switch 3 becomes the same □, and then given to the input switch 3, and further delayed by one field in the field memory 4. Ru. In this way, this embodiment is configured to obtain a composite video signal delayed by two or three fields.

Reference numeral 15 denotes an output switch that switches in response to a control signal from the switch control circuit 5, and this output switch 15 receives the delayed video signal from the synchronous signal processing circuit 13 and the composite video signal from the input terminal 2. A non-delayed composite video signal is output to the output terminal 16 for the field section played from the video disk, and a delayed video signal delayed by 1 to 3 fields is output for the other 3 fields. The same composite video signal is output from the four fields to perform still playback.

<Effects of the Invention> As described above, according to the present invention, a field-delayed video signal is clamped at the timing immediately after the burst signal within the blanking period of the video signal, without affecting the playback screen. It is possible to clamp effectively and prevent fluctuations in the pedestal level.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a signal waveform diagram, in which FIG. 2(A) is a composite video signal, FIG. 2(B) is a transfer lock, and FIG. C) is a waveform diagram showing a delayed video signal, FIG. 2(D') is a clamp pulse, and FIG. 2(D) is a waveform diagram showing a delayed composite video signal. 4...Field memory, death...removal means, 11...
・) Clamp circuit, 12...
- Synchronization signal generation circuit, 13... Synchronization signal processing circuit.

Claims (1)

[Claims] (1) a removal means for removing a synchronization signal period from a composite video signal; a field memory for field-delaying the video signal from the removal means and outputting it as a delayed video signal; and a field-delayed video signal from the field memory. a clamp circuit that clamps the synchronization signal at a timing immediately after the burst signal within the blanking period of the video signal; a synchronization signal generation circuit that generates a synchronization signal phase-locked to the composite video signal; A field delay device comprising an additional synchronous signal processing circuit.