JPS6350283A - Noise removal circuit - Google Patents

Noise removal circuit

Info

Publication number
JPS6350283A
JPS6350283A JP61194425A JP19442586A JPS6350283A JP S6350283 A JPS6350283 A JP S6350283A JP 61194425 A JP61194425 A JP 61194425A JP 19442586 A JP19442586 A JP 19442586A JP S6350283 A JPS6350283 A JP S6350283A
Authority
JP
Japan
Prior art keywords
signal
output
circuit
synchronization signal
variable delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61194425A
Other languages
Japanese (ja)
Inventor
Shigemasa Kobayashi
重政 小林
Tomonobu Kimura
木村 友信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61194425A priority Critical patent/JPS6350283A/en
Publication of JPS6350283A publication Critical patent/JPS6350283A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To remove noise entering a synchronizing separator circuit due to the omission of a signal by logically comparing an output from a variable delay circuit, which is obtained by delaying a horizontal synchronizing signal period TH, with a synchronizing signal. CONSTITUTION:An output signal from a synchronizing separator circuit 2 is logically compared with the output signal from the variable delay circuit 7, which is obtained by delaying the horizontal synchronizing period TH by about TH + DELTAt, and phase-compared with a reference horizontal synchronizing signal from an oscillator 4, thereby obtaining a phase comparison error signal. In such a way a horizontal synchronizing section including noise due to the omission of a signal is logically compared with a horizontal synchronizing section, which is delayed by about TH + DELTAt to exclude noise, thereby obtaining a noise- free horizontal synchronizing signal.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はビデオ信号に含まれる同期信号のノイズ除去回
路に関するものであり、ビデオディスク。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a noise removal circuit for synchronizing signals included in video signals, and relates to a video disc.

”/TR等の映像記録再生装置に使用される。”/TR and other video recording and reproducing devices.

従来の技術 ビデオディスク及びVTR等の映像信号記録再生におい
ては、再生ビデオ信号より同期信号を抜き取り、同期信
号の立下り又は立上り情報により遅延してパーストゲー
ト信号を得ている。又は、水平同期信号全基準発振周波
数と位相比較して時間軸誤差信号2得、時間軸補正制御
全行なっているO 従来のビデオディスクプレーヤにおいて、時間軸誤差信
号を得る回路構成を第3図に示す。
Conventional technology In recording and reproducing video signals for video disks, VTRs, etc., a synchronizing signal is extracted from a reproduced video signal and delayed by falling or rising information of the synchronizing signal to obtain a burst gate signal. Alternatively, the phase of the horizontal synchronization signal is compared with all reference oscillation frequencies to obtain the time axis error signal 2, and all time axis correction control is performed. In a conventional video disc player, the circuit configuration for obtaining the time axis error signal is shown in Figure 3. show.

第3図において、1はビデオディスク等によって記録媒
体より再生されたビデオ信号の入力端子、2は入カピデ
オ信号より同期信号2抜き取る同期分離回路、3は基準
発振周波数を発生する発振器4よりの信号と同期信号と
を位相比較して位相誤差信号を発生する位相比較器、6
は位相誤差信号を出力する出力端子である。
In FIG. 3, 1 is an input terminal for a video signal reproduced from a recording medium such as a video disk, 2 is a synchronization separation circuit that extracts a synchronization signal 2 from an input video signal, and 3 is a signal from an oscillator 4 that generates a reference oscillation frequency. a phase comparator for generating a phase error signal by comparing the phases of the signal and the synchronization signal;
is an output terminal that outputs a phase error signal.

一般にビデオディスク等によって再生されるビデオ信号
は、記録媒体の欠陥によって信号の一部が欠落して、欠
落区間だけビデオ信号が白レベル又は黒レベルに大きく
飛び出す。この様な例を第4図に示す。第4図において
、aは入力ビデオ信号、bは入力ビデオ信号を同期信号
中央付近の電圧で同期分離したときの同期分離出力波形
で負極性ある。信号欠落区間は、aに示すように黒レベ
ルより下に飛び出したり、白レベルより上に飛び出した
りする。同期分離回路によって信号欠落によるノイズ成
分が取り出されると、同期信号と基準発振周波数との位
相比較において、大きな位相誤差となって出力される為
、時間軸補正が誤動作を起こす事となる。
Generally, in a video signal reproduced from a video disk or the like, a portion of the signal is dropped due to a defect in the recording medium, and the video signal jumps significantly to the white level or black level in the missing section. Such an example is shown in FIG. In FIG. 4, a is an input video signal, and b is a sync-separated output waveform when the input video signal is sync-separated at a voltage near the center of the sync signal, which has a negative polarity. As shown in a, the signal missing section jumps out below the black level or jumps out above the white level. When a noise component due to signal loss is extracted by the synchronization separation circuit, a large phase error is output when comparing the phases of the synchronization signal and the reference oscillation frequency, causing a malfunction in time axis correction.

発明が解決しようとする問題点 前記従来回路の構成では、信号欠落によって生ずる同期
分離出力に混入するノイズによって時間軸補正等に大き
な障害を与えるものであった。
Problems to be Solved by the Invention In the configuration of the conventional circuit described above, noise mixed into the synchronization separation output caused by signal dropout greatly impedes time base correction.

本発明は、前記時間軸補正等に係わる問題を解決するも
のである。すなわち、信号欠落によって発生する同期分
離出力に混入するノイズを除去し、安定した時間軸補正
等を提供するものである。
The present invention is intended to solve the problems related to the time axis correction and the like. In other words, noise mixed into the synchronization separation output caused by signal loss is removed, and stable time axis correction is provided.

問題点を解決するための手段 本発明は、上記問題点全解決する為に水平同期信号周期
TII(TH=+83.5sa71sec)をTli+
Δを程遅らせた少なくとも1つの可変遅延回路と、論理
乗算回路と、位相比較器と、低域濾波回路と、電圧制御
発振器より構成されたことを特徴とするものである。
Means for Solving the Problems In order to solve all of the above problems, the present invention changes the horizontal synchronizing signal period TII (TH=+83.5sa71sec) to Tli+
The device is characterized in that it is comprised of at least one variable delay circuit delayed by Δ, a logic multiplication circuit, a phase comparator, a low-pass filter circuit, and a voltage controlled oscillator.

作用 上記の構成により、信号欠落等によって発生するノイズ
を含む同期信号と、前記同期信号に同期した水平同期信
号周期T3をTヨ+Δを程遅らせた少なくとも1つの可
変遅延回路出力信号とを論理比較することによってノイ
ズを除去するものであり、正しい同期i信号の位相情報
を取り出すことができるため時間軸補正制御等の安定し
た動作が可能である。
Effect: With the above configuration, a synchronization signal containing noise caused by signal loss, etc. is logically compared with at least one variable delay circuit output signal obtained by delaying the horizontal synchronization signal period T3 synchronized with the synchronization signal by Tyo + Δ. By doing so, noise is removed, and since correct phase information of the synchronized i signal can be extracted, stable operations such as time axis correction control are possible.

実施例 第1図は、本発明のノイズ除去回路の一実施例を使用し
た位相比較回路を示す構成図である。第1図において、
1はビデオ信号入力端子、2は入力ビデオ信号より同期
信号を分離する同期分離回路、6は同期分離回路2の出
力信号(負極性)と水平同期信号周期T、QTヨ+Δを
程遅らせた可変遅延回路7の出力信号を論理比較するO
R回路、3は基準発振周波数fB(fH=15.734
264KH2)を発生する発振器4よりの信号と同期信
号を位相比較して位相誤差信号を発生する位相比較器、
6は位相誤差信号を出力する出力端子、8は位相比較器
出力を低域を波する低域r波回路、9は低域濾波回路8
より電圧制御全損する発振器である。
Embodiment FIG. 1 is a block diagram showing a phase comparator circuit using an embodiment of the noise removal circuit of the present invention. In Figure 1,
1 is a video signal input terminal, 2 is a synchronization separation circuit that separates the synchronization signal from the input video signal, and 6 is a variable that delays the output signal (negative polarity) of the synchronization separation circuit 2 and the horizontal synchronization signal period T, QT yo + Δ. O logically compares the output signal of the delay circuit 7
R circuit, 3 is the reference oscillation frequency fB (fH=15.734
a phase comparator that generates a phase error signal by comparing the phases of the signal from the oscillator 4 that generates 264KH2) and the synchronization signal;
6 is an output terminal that outputs a phase error signal, 8 is a low-frequency r-wave circuit that waves the output of the phase comparator in a low frequency range, and 9 is a low-pass filter circuit 8
This is an oscillator that suffers from complete voltage control loss.

同期分離回路の出力信号と水平同期信号周期T、IをT
H+Δt程遅らせた可変遅延回路の出力信号とを論理比
較し、この出力信号を発振器の基準水平同期信号と位相
比較し、位相比較誤差信号を得ている。位相比較誤差信
号を低域濾波し、低域沢波回路出力を電圧制御により発
振させて得た信号により水平同期信号周期T、iTヨ+
Δを程遅らせ可変遅延回路出力の信号は、再生同期信号
に同期した信号となっている。
The output signal of the synchronization separation circuit and the horizontal synchronization signal period T, I are T
A logical comparison is made with the output signal of the variable delay circuit delayed by H+Δt, and the phase of this output signal is compared with the reference horizontal synchronization signal of the oscillator to obtain a phase comparison error signal. The phase comparison error signal is low-pass filtered, and the output of the low-frequency wave circuit is oscillated by voltage control.
The signal output from the variable delay circuit, which is delayed by Δ, is a signal synchronized with the reproduction synchronization signal.

第2図に本発明の各部動作波形を示す。第2図において
、aは基準水平同期信号でありbは入力ビデオ信号であ
り、映像区間に信号が欠落している。Cは入力ビデオ信
号を同期信号中央付近の電圧で同期分離した時の同期分
離出力である。この同期信号出力には、信号欠落により
発生したノイズが含まれる。dは同期信号出力を水平同
期信号周期TH’eT!!+Δを程遅らせた可変遅延回
路出力である。eは同期分離出力CとTヨ+Δを程遅ら
せた可変遅延回路出力dとを論理比較したOR回路出力
であり、信号欠落によるノイズを含む水平同期区間とT
H+Δt程遅らせたノイズを含まない水平同期区間を論
理比較し、ノイズを除去した水平同期信号周期ている。
FIG. 2 shows operational waveforms of each part of the present invention. In FIG. 2, a is a reference horizontal synchronizing signal, b is an input video signal, and the signal is missing in the video section. C is a sync-separated output when the input video signal is sync-separated at a voltage near the center of the sync signal. This synchronization signal output includes noise generated due to signal loss. d is the horizontal synchronization signal period TH'eT! ! This is the variable delay circuit output delayed by +Δ. e is an OR circuit output that logically compares the synchronization separation output C and the variable delay circuit output d delayed by Tyo + Δ, and is the output of a horizontal synchronization section containing noise due to signal loss and T
A horizontal synchronization period that does not include noise and is delayed by H+Δt is logically compared, and the period of the horizontal synchronization signal from which noise is removed is determined.

万一、T、遅らせた水平同期区間の同一位置にノイズが
発生している場合には、論理比較出力後もノイズを含む
ことになるが、実用上きわめてまれである。
In the unlikely event that noise occurs at the same position in the horizontal synchronization interval delayed by T, noise will be included even after the logical comparison output, but this is extremely rare in practice.

発明の効果 本発明によれば、水平同期信号周期T□程の可変遅延回
路出力と同期信号を論理比較するよう構成したことによ
り、信号欠落等によって同期分離回路出力に混入するノ
イズを除去することが可能である。さらに2xT11,
3x’I’ヨ、・・・・・・という様に、可変遅延回路
を追加することでより安定したノイズ除去が可能である
。以上の様に本発明は、実用上きわめて有用である。
Effects of the Invention According to the present invention, noise mixed into the output of the synchronization separation circuit due to signal loss etc. can be removed by logically comparing the output of the variable delay circuit with the horizontal synchronization signal period T□ and the synchronization signal. is possible. Furthermore 2xT11,
More stable noise removal is possible by adding a variable delay circuit, such as 3x'I'Yo.... As described above, the present invention is extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例におけるノイズ除去回路の構
成を示すブロック図、第2図は本発明のノイズ除去回路
の要部波形を示す波形図、第3図は従来の位相比較回路
の構成を示すブロック図、第4図は従来の位相比較回路
の要部波形を示す波形図である。 1・・・・・・ビデオ信号入力端子、2・・・・・・同
期分離回路、3・・・・・・位相比較器、4・・・・・
・発振器、6・・・・・・位相誤差出力端子、6・・・
・・・OR回路、7・・・・・・可変遅延回路、8・・
・・・・低域r波回路、9・・・・・・電圧制御発振器
。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第1
図 第2図 (eン 第3図 第4図
FIG. 1 is a block diagram showing the configuration of a noise removal circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram showing main part waveforms of the noise removal circuit of the present invention, and FIG. FIG. 4 is a block diagram showing the configuration, and a waveform diagram showing main part waveforms of a conventional phase comparator circuit. 1... Video signal input terminal, 2... Synchronization separation circuit, 3... Phase comparator, 4...
・Oscillator, 6... Phase error output terminal, 6...
...OR circuit, 7...Variable delay circuit, 8...
...Low frequency r-wave circuit, 9...Voltage controlled oscillator. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2 (Figure 3 Figure 4)

Claims (1)

【特許請求の範囲】[Claims] 記録媒体より再生されたビデオ信号より分離された再生
同期信号と、基準水平同期信号の周期T_HをT_H+
Δt程遅らせる少なくとも1つの可変遅延回路と、前記
再生同期信号と前記可変遅延回路出力とを論理乗算する
回路と、前記論理乗算回路出力と発振器の基準水平同期
信号出力とを位相比較する位相比較器と、前記位相比較
出力を低域濾波する低域濾波回路と、前記低域濾波回路
出力により電圧制御発振する発振器を備え、前記電圧制
御発振器出力を前記可変遅延回路に入力し前記再生同期
信号と前記可変遅延回路出力とを論理乗算することによ
り同期分離後の再生同期信号に含まれるノイズを除去す
るようにしたことを特徴とするノイズ除去回路。
The period T_H of the reproduction synchronization signal separated from the video signal reproduced from the recording medium and the reference horizontal synchronization signal is T_H+
at least one variable delay circuit that delays by Δt; a circuit that logically multiplies the reproduction synchronization signal and the output of the variable delay circuit; and a phase comparator that compares the phases of the output of the logical multiplication circuit and the output of the reference horizontal synchronization signal of the oscillator. and a low-pass filter circuit that low-pass filters the phase comparison output, and an oscillator that performs voltage-controlled oscillation using the output of the low-pass filter circuit, and inputs the output of the voltage-controlled oscillator to the variable delay circuit and generates the reproduction synchronization signal. A noise removal circuit characterized in that noise contained in a reproduced synchronization signal after synchronization separation is removed by logically multiplying the output of the variable delay circuit.
JP61194425A 1986-08-20 1986-08-20 Noise removal circuit Pending JPS6350283A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61194425A JPS6350283A (en) 1986-08-20 1986-08-20 Noise removal circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61194425A JPS6350283A (en) 1986-08-20 1986-08-20 Noise removal circuit

Publications (1)

Publication Number Publication Date
JPS6350283A true JPS6350283A (en) 1988-03-03

Family

ID=16324390

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61194425A Pending JPS6350283A (en) 1986-08-20 1986-08-20 Noise removal circuit

Country Status (1)

Country Link
JP (1) JPS6350283A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2146355A1 (en) 2007-05-09 2010-01-20 Hitachi Chemical Company, Ltd. Conductor connection member, connection structure, and solar cell module
US20100147355A1 (en) * 2006-10-10 2010-06-17 Hitachi Chemical Company, Ltd. Connected structure and method for manufacture thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229271A (en) * 1984-04-27 1985-11-14 Pioneer Electronic Corp Time base correcting device
JPS61158283A (en) * 1984-12-28 1986-07-17 Sony Corp Time base corrector

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60229271A (en) * 1984-04-27 1985-11-14 Pioneer Electronic Corp Time base correcting device
JPS61158283A (en) * 1984-12-28 1986-07-17 Sony Corp Time base corrector

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100147355A1 (en) * 2006-10-10 2010-06-17 Hitachi Chemical Company, Ltd. Connected structure and method for manufacture thereof
US9123835B2 (en) * 2006-10-10 2015-09-01 Hitachi Chemical Company, Ltd. Connected structure and method for manufacture thereof
EP2146355A1 (en) 2007-05-09 2010-01-20 Hitachi Chemical Company, Ltd. Conductor connection member, connection structure, and solar cell module

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