JPS6188184A - Electronic time piece having snoozing function - Google Patents

Abstract

PURPOSE:To form plural snoozing patterns to improve its function by forming a counter having two different time outputs in an electronic time piece for outputting a control signal to an alarm and an external apparatus to make the counter execute the snoozing operation. CONSTITUTION:An electronic time piece for selectively outputting an alarm driving signal BUZ and an external apparatus (radio or the like) control signal RADIO on the basis of the contents set up in an alarm time storage circuit 2 is provided with a snoozing circuit 6 actuated by a snooze request signal SNOOZ and an alarm stop counter 7 preset by a coincidence detecting signal DE or the snooze request signal SNOOZ. After two different times having elapsed, signals T10, T20 are outputted respectively from the counter 7 and inputted to a control circuit 5 for selectively outputting the signals RADIO, BUZ to change the snoozing function by the signals T10, T20 respectively.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to an electronic timepiece that has two types of alarms: an acoustic signal alarm and an alarm that controls external equipment, and is also equipped with a snooze function.

(B) Conventional Technology Conventionally, in electronic watches equipped with a snooze function, when it is detected that a preset time has arrived.

The outputs of these seven flip-flops set a flip-flop, and the output of the seven flip-flops outputs a signal for generating an alarm sound. When the snooze switch is operated during the alarm period, a flip-flop that stores the snooze request is set, and a timer circuit that measures the snooze time starts operating. The output of the flip-flop for snooze prohibits the output of the signal for generating the alarm sound, and the timer circuit generates the alarm sound by resetting the 71J knob flop for snooze when the output is counted for a predetermined time. The prohibition on signals will be lifted in order to In this way, the alarm sound generated when the predetermined alarm time arrives,
By operating the snooze switch, it will be stopped for a certain period of time and then restarted. This technology was published in Japanese Patent Publication No. 54-4170.
It is disclosed in the publication No.

(・'1 Problem to be solved by the invention However, when adding a snooze function to an electronic watch that is equipped not only with an acoustic means as an alarm but also with an external device control signal that controls an external device such as a radio, etc.) , it is necessary to select whether it is the sound means or the external device that is to be stopped by operating the snooze switch.

If only one of them is controlled, or if both are controlled at the same time, the function will be simple and the product will be unattractive.

B) Means for Solving the Problems The present invention has been made in view of the above-mentioned points, and includes a plurality of alarm time signals.

an alarm stop counter that starts operating in response to a snooze request signal generated by operating a snooze switch; a snooze circuit that changes its state depending on the output of an alarm drive signal that is controlled by the snooze request signal and generates an alarm sound; and a snooze circuit. Time 1. from the output and alarm stop counter. and a control circuit that controls the output mode of the alarm drive signal or the external device control signal based on the signal indicating the time t, and the signal indicating the time t.
The snooze function is different for time t1 and time t.

(e) Effect According to the above-mentioned means, for example, 1. Turn on the radio etc. using an external device control signal until the time t
In an alarm pattern that turns on not only the radio but also an alarm sound, such as a buzzer, after tl time, if the snooze switch is operated by tl time, the radio
The time will be stopped and the snooze switch will be set to 1 after 10 hours.
When operated twice, the radio remains on and only the buzzer turns 1.
If the snooze switch is pressed again before the buzzer sounds again, the radio will stop.
At this time, the radio will turn on again after t1 hours and the buzzer will turn on at 12
It will turn on again after a certain period of time.

(C) Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention.
) is a current time counter, (2) is an alarm time storage circuit, (3) is a coincidence detection circuit, (4) is a flip-flop for alarm storage (F F ), +51 is a control circuit, (6
) is a snooze circuit, (input is a counter for stopping an alarm. The current time counter (1) counts the minute signal Cs outputted once per minute from a second counter (not shown), and measures the minutes and hours. Yes, the timed time is displayed on a display device (not shown).Alarm time storage circuit (2
), the time at which an alarm should be generated, that is, the hour and minute, is preset by an external operation switch, and the alarm time is displayed on the display device as necessary. The coincidence detection circuit (3) compares the output of the current time counter (1) and the output of the alarm time storage circuit (2), and when they match,
That is, when the current time and the alarm time match, the output signal DE is output. The alarm storage FFf4) is a flip-flop that is set by the minus number output signal DE and stores that the alarm time has come, and is reset by the signal T59 output from the alarm counter (7) after 59 minutes. The output Q of the alarm memory FF (4) is applied to the control circuit (5), and the control circuit (5) outputs a radio control signal RADIO, which is an external device control signal, and a buzzer drive signal BUZ, which is an alarm drive signal. It's in control. The control circuit (5) controls the output of the snooze circuit (6) and the time t from the start of operation of the alarm stop counter (7).
The radio control signal RADIO and buzzer drive are based on the signal T1° which becomes "1" during + (t+" 10 minutes) and the signal T which becomes "1" during time t2 (t2 = 20 minutes) from the start of operation. It controls the output turn of the signal BUZ, and the output of the snooze circuit (6) and the signals T1° and T2o
AND gates (8) (9) (10) applied to select
, NAND gate (11) and NOR gate)
αz, NAND gate (11) and NOR gate (12)
1 output is applied and the output Q of the alarm storage FF (4)
is applied to the AND gate (131 yen) and the output along the AND gate 0 and the buzzer drive frequency signal BUZTONE
is applied to the AND game H5), and
The output of the gate 03) is the radio control signal RADIO, and the output of the AND gate α■ is the buzzer drive signal BUZ. The snooze circuit (6) generates a snooze request signal 5N when a snooze switch (not shown) is operated.
Controlled by OOZ, whether or not the buzzer drive signal BUZ is output, that is, the output of AND gate I is 1n
The memory state changes depending on whether the power is 0" or not, and AN
The output of the D game (14) is applied to the latch input via the inverter (16), and the snooze request signal 5NOOZ is generated.
is applied to the clock terminal ψ, and the AND gates (18) (19) to which the outputs Q and Q of the launch circuit (17) are applied and the snooze request signal 5NOOZ is applied.
and.

The output of the AND gate Q8) is applied to the set terminal S,
The output of the AND gate Q91 and the output signal DE are applied to the reset terminal R via the OR buzzer (201).
(21), and the output Q of FFC2υ is the control circuit (
5) AND gate (8) α■ and NAND gate 01
), and the signal inverted by the inverter (2) is applied to the AND gate (9).The alarm stop counter (7) calculates the time from the match of the alarm time until the alarm is stopped by the minute signal C6. It is generated by counting the -number output signal DE is generated by counting the OR gate (
When applied via c), 59 minutes is preset and subtraction counting is started. Then, 59 minutes later, signal T2.
is output and the alarm memory FF (4) is reset, and the minute signal C8 is inhibited by the OR gate (2) to stop the counting operation.
The signal TIO that becomes 1” is the AND game of the control circuit (5))
(9) (1) is applied, and time 12 (2
The signal T2o which becomes "1" during the period of 0 minutes) is applied to the AND gate (8
) is applied to Further, the alarm stop counter (7) is again preset to 59 minutes and starts operating by the snooze request signal 5NOOZ even if it is in operation.

FIG. 2 shows the operation of the circuit configured as shown in FIG. 1.

This will be explained with reference to FIGS. 3, 4, and 5.

In the case of Fig. 2, the alarm time set in the alarm time memory circuit (2) and the current time counter (1) are
When the times match, the match detection circuit (3) outputs a minus number output signal DE. - The alarm stop counter (7) is preset to 59 minutes by the several output signal DE and starts operation, and the alarm storage FF (4) is also set and its output Q becomes 1''.At this time, the alarm Signal Tlo applied to the control circuit (5) from the stop counter (force
and T. are both 1", and the snooze circuit (6
Since the FF (2υ of
What is the output of the AND gate 00) to which is applied? I Oll
and the inputs of the NAND gate (11) are both u Ou
Therefore, its output becomes 1". Therefore, at the same time as the alarm matches, the output of AND gate 03), that is, the radio control signal RADIO, turns on. On the other hand, the output of inverter @ which inverts the output Q of Flu) is 1"' and the signal TIO is also "1", so the output of the AND gate (9) is 1" and the output of the NOR gate a2 is on.

Therefore, the output of the AND game (141) becomes 0'' and prohibits the buzzer drive signal BUZ.
When the signal TIG becomes 0", the output of the AND gate (9) becomes 0" and the output of the NOR gate 07J becomes "1", so the output along the AND gate α becomes 1" and the buzzer drive signal BUZ is output. Furthermore, the diameter of 20 minutes is O
”, but this signal T2o causes the radio control signal R
ADIO and buzzer drive signal BUZ do not change. When the alarm stop counter (signal T, 59 minutes after the force operation starts) becomes 1", the alarm stop counter (force operation stops, and the alarm memory FF (41) is reset, so the AND gate (13 )(14) stops outputting the radio control signal RADIO and the buzzer drive signal BUZ.In this way, in the case of the operation shown in FIG. 2, only the radio is turned on for 10 minutes after the alarm matches. The buzzer also turns on after 10 minutes, and turns off after 59 minutes.

Figure 3 shows the case where the snooze switch is operated within 10 minutes after the alarm matches.Similar to Figure 2, if the snooze switch is operated when only the radio is on due to the alarm matching, Snooze request signal 5NOOZI
7) A pulse of 1"° causes the alarm stop counter (7
) is again preselected at 59 minutes and starts operating from the initial state. Also, at this time, the ANDNO gate output is n
Ou, the output ``1'' of the inverter α6) is applied to the input of the latch circuit 07), and the output Q of the latch circuit (1η is 1'' and Q is 0''. Therefore, the snooze request signal Since the 5NOOZ pulse is output via the ANDNO gate, the FF (21) is set and its output Q becomes "1".Then, the signal T,, =61''
The output of the ANDNO gate to which
The gate (13) inhibits the output of the radio control signal RAD IO - and the signal T, 1o minutes after the radio is turned off by snooze.

becomes 0".Then, the output of the AND gate (10) becomes "
0'', and the output of the NAND gate σD becomes ``1'', so the AND gate) (131 is the radio control signal RA again.
Output DIO. Furthermore, when the signal T2o becomes 0'' after 20 minutes, the output of the AND gate (8) becomes O'',
Furthermore, since the output of the ANT) gate (9) is also "0", the output of the NOR gate 0z becomes "1", and as a result, the AND gate (14) stops outputting the buzzer drive signal B U Z. Then, after 59 minutes, the signal T50 becomes "'1", and the operation of the alarm stop counter (7) is stopped, and the alarm storage FF (4) is reset, so that the radio and buzzer are turned off. In this way, if the snooze switch is operated within 10 minutes after the alarm matches, the radio will be turned off for 10 minutes.

FIG. 4 shows a case where the snooze switch is operated after 10 minutes have passed after the alarm matches. As shown in Figure 2 (,
After 10 minutes have elapsed, both the radio control signal RADIO and the buzzer drive signal BUZ are being output. Therefore, when the snooze switch is operated, the snooze request signal 5NOOZ becomes a pulse of ++II+, but at this time, the input of the latch circuit (17) is
4), the output "'0" of the inverter (16) is applied, the output Q of the latch circuit (17) is "0", and Φ is "1".

It becomes. Therefore, the FF (2υ) remains in the reset state. On the other hand, the alarm stop counter (7) is preset at 59 minutes by the snooze request signal 5NOOZ and starts operating from the initial state, so the signal T. is 1” again
becomes. Signal T. becomes “1”, the AND gate (to which the output “1” of the inverter (23) is applied)
9) becomes 1", and the output of the NOR gate (IZ becomes 0". This causes the output of the AND game) (141kt buzzer drive signal BUZ to stop. Then, 10 minutes after snooze, the signal TIO becomes 0". By becoming "0" again, the output of the AND gate (9) becomes "on, NO.
R game) (In order for the output of 121 to be 61", AND
The gate (once the buzzer drive signal BUZ is output.Furthermore, when the signal T3 becomes 1" after 59 minutes, the operation of the alarm stop counter (7) is stopped and the alarm storage FF (4) is activated. After being reset, the radio and buzzer are turned off.In this way, by operating the snooze switch once while the radio and buzzer are on, only the buzzer is stopped for 10 minutes.

FIG. 5 shows the case where the snooze switch is operated twice after 10 minutes have passed since the alarm coincides. In this case, the first operation of the snooze switch is the same as the operation shown in FIG. 4, and only the buzzer stops.

If the snooze switch is operated for the second time within 10 minutes after the buzzer stops, the pulse 11' of the snooze request signal 5NOOZ is activated.

When the alarm stops, the counter (force is preset to 59 minutes again and starts operating from the initial state. At this time, the AN
Since the DNO gate output is 0", the output of the inverter (16+) "1" is applied to the input of the latch circuit αη, so the output Q of the latch circuit (17) is 1", and Q is "
0''. Therefore, the snooze request signal 5NOO
The Z pulse sets FFC) υ, and its output Q becomes 1''.

Then, the AND signal to which the signal T1° of 1″ is applied
Gate (10) 17) Output is 1”, furthermore, NAN
Since the output of the D gate fil) becomes o', the AND gate 0 inhibits the output of the radio control signal RADIO.

Then, after 10 minutes have elapsed, the signal T1° becomes "°0'°, so the output of the AND gate (10) is 0".

Since the output of NAND gate 01) becomes 1”, AND
Gate α3) again outputs the radio control signal RADIO. Furthermore, after 20 minutes have passed, the signals T and o become "o", so the output of the AND gate (8) becomes 0".

Since the output of NOR gate α2 becomes 61", the output of AND gate Q4) becomes 1", and the buzzer drive signal BUZ
is output. In this way, by operating the snooze switch twice when both the radio and the buzzer are on, both the radio and the buzzer will turn off, and the snooze will turn on the 10 minute diameter geo and the 20 minute diameter geo. It will become.

Note that the alarm stop counter (power can also be used in common with the sleeve timer counter that turns on the radio for a certain period of time).

(g) Effects of the Invention As described above, according to the present invention, in an electronic watch having both a radio and a buzzer as alarm means, the order in which alarms are generated is stepwise.

Furthermore, since there are multiple snooze patterns, a functional and easy-to-use electronic timepiece can be obtained, which also has the advantage of increasing its commercial appeal.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
3, 4, and 5 are timing diagrams showing the operation of the embodiment shown in FIG. 1. Explanation of main drawing numbers (1)...Current time counter, (2)...Alarm time storage circuit, (3)...-number output circuit, (4)
... FF for alarm storage, (5) ... control circuit,
(6)...Snooze circuit, (7)...Alarm stop counter. Applicant: Sanyo Kuuki Co., Ltd. and one other agent: Shizuo Sano, patent attorney Figure 2 Figure 317I Figure 4 75 Leap

Claims (1)

[Claims] 1. When a match between the current time and a preset alarm time is detected, an alarm drive signal or an external device control signal is output, and the output of the alarm drive signal or external device control signal is kept constant by operating the snooze switch. In an electronic watch with a snooze function that stops time, the alarm stop counter is preset to a predetermined value by a coincidence detection signal generated when the current time and the alarm time match or a snooze request signal generated by operating a snooze switch; a snooze circuit that is controlled by a request signal and changes its state depending on whether or not the alarm drive signal is output; a signal indicating the passage of time t_1 outputted from the output of the snooze circuit and the alarm stop counter; and a signal indicating the passage of time t_2. and a control circuit that selectively outputs the alarm drive signal or the external device control signal based on the signal indicated, and the snooze function is different with respect to the times t_1 and t_2.