JPS6187475A - Horizontal synchronizing circuit - Google Patents

Abstract

PURPOSE:To simplify the circuit and to improve noise immunity by using a transmission gate as a phase comparator in a horizontal synchronizing circuit of a television set. CONSTITUTION:A negative level composite video signal is fed to a video signal input terminal 51, the signal is subject to synchronous separation by an amplitude separating transistor (TR) 52, positive synchronizing signal is obtained via a buffer 53 and fed to a control input terminal 55 of transmission gate. A comparison signal from a frequency divider is inputted to a comparison signal input terminal 56 and fed to the signal input terminal 54 of the transmission gate. The synchronizing signal from the synchronous separation circuit controls the transmission gate to fetch a comparison signal from the frequency divider when the synchronizing signal is at H level. The level of the synchronizing signal when the transmission gate is set becomes a comparison output. A potential stored in a low pass filter becomes the comparison output when the gate is turned off.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a horizontal synchronization circuit used in television equipment, particularly a television receiver.

[Prior art]

In television receivers, it is necessary to synchronize the receiver with the timing of video signal transmission on the transmitting side, so a synchronization signal is extracted from the composite video signal and used as a reference signal for horizontal and vertical scanning. Since the synchronization signal has a wide pulse width, it is less susceptible to noise components than the horizontal synchronization signal, so a simple low-pass filter is usually used to separate the vertical synchronization signal.
The vertical oscillator is directly synchronized.

Also, in receivers that do not have a separate vertical oscillator, the vertical counter is directly reset.

On the other hand, the horizontal synchronization signal has a pulse width of about 5 μS,
Because it is relatively susceptible to noise, the horizontal synchronization signal
A phase-locked loop (p:
c, b) and uses a horizontal synchronization signal as its reference signal. ◇ Even in LCD TVs that use LCD pulse as a display device, the configuration of the horizontal synchronization system is the same, and the branching unit included in the PI+L system (counter) output is used to obtain the necessary timing signal.In LCD TVs, the logic circuit part is usually 0 MO
Since it takes three configurations, the PI, I, and systems need to be realized by CMOS-C.

However, in the 0MO3-IC, the analog circuit format used in the Piborae C cannot often be used because the analog circuit has not been sufficiently developed.

Therefore, the components of the PLL system are required to be implemented using logic elements as much as possible. □Figure 1 shows an example of a phase comparator that has been put into practical use, but it is completely composed of logic elements. In FIG. 6 showing the configuration of the system, it is used together with a charge pump 34.

As shown in FIG. 2, this phase comparator generates a phase comparison output at output terminals U13 and D14 based on the phase difference between two signals applied to a reference signal input terminal R11 and a comparison signal input terminal V12.

Looking at the timing diagram of FIG. 2, it can be seen that the operation is based on the phase difference between the edges (falling edges) of the reference signal R and the comparison signal V.

Generally, a received composite synchronization signal often contains a lot of interference, so a PLL system is required to remove noise components, but the phase comparator shown in FIG. 1 cannot satisfy this requirement.

This is because the phase comparator shown in FIG. 1 operates using only edge information of the input signal, and therefore has no ability to discriminate between noise and synchronization signals.

Therefore, it is inappropriate to adopt this phase comparator in a TV receiver that is expected to be used in a noisy environment. , noise (pulse nature) must be removed in advance.

Since this noise removal means requires a considerably large circuit scale, it is impossible to adopt one with sufficient capability, at least at the stage of consumer products.

〔the purpose〕

The present invention was proposed in order to solve the above-mentioned drawbacks, and an object of the present invention is to provide a horizontal synchronization circuit with high noise rejection ability by employing a phase comparator that is less likely to malfunction due to noise. ◇ [Summary] According to the present invention, the transmission gate, which can be easily realized with 0MO8-O, is used as a phase comparator, so the circuit becomes simple, and its operation also takes in the pulse width of the input signal as information. In addition, it is possible to realize a horizontal synchronization circuit with good noise resistance performance. [Embodiments] Hereinafter, embodiments according to the present invention will be described with reference to the drawings.

FIG. 4 is a block diagram of the horizontal synchronization circuit of the present invention, and FIG. 5 is an embodiment of the phase comparator and its surroundings.

First, in FIG. 4, a composite synchronization signal is separated from a composite video signal input to a video signal input terminal 41 by a synchronization separation circuit 42, and is supplied to a phase comparator 43 as a reference signal.

The phase comparator 43 compares the phase of the horizontal period pulse generated by the frequency divider 46 and the composite synchronization signal, and supplies the phase comparison output to the low-pass filter 44.

The phase difference signal filtered by the low-pass filter 44 is
The frequency divider 46 controls the oscillation frequency of the voltage controlled oscillator 45. The frequency divider 46 divides the output of the voltage controlled oscillator 45 and outputs a timing signal group necessary for the liquid crystal panel driver to the timing signal output terminal 47. The frequency generator 46 also outputs a comparison signal to the phase comparator 43, but its period is a horizontal period, and its pulse width is equal to or less than the horizontal synchronizing signal.

FIG. 5 shows the synchronous separation circuit 42 and phase comparator 43 in FIG.
, a synchronous negative composite video signal is applied to the 0 video signal input terminal 51, which is an embodiment of the low-pass filter 44, and is synchronously separated by the amplitude separation transistor 52.
It becomes a positive synchronization signal through the buffer 53 and is supplied to the control input terminal 55 of the transmission gate.
' The comparison signal from the frequency divider 46 is inputted to the comparison signal input terminal 56, and the output terminal 57 of the transmission gate, which is supplied to the signal input terminal 54 of the transmission and gate, is connected to a low-pass filter. The input/output relationship of this transmission gate is shown in FIG. (It is in a synchronous state.) The transmission gate is controlled by the synchronization signal which is the reference signal 62 from the synchronization separation circuit 42, and the reference signal 62 is
At the level, the comparison signal 61 from the branching unit 46 is taken in.

The level of the synchronization signal during the period when the transmission gate is on is the comparison output 63.O During the period when the transmission gate is off, that is, the period when the reference signal 62 is at L level, the potential held in the low-pass filter is the potential of the comparison output 63. becomes.

In order to obtain the synchronized state as shown in FIG. 6), the control characteristics of the voltage controlled oscillator 45 must have the characteristics shown in FIG.

The transmission gate performs a phase comparison operation as shown in FIG. 6.The feature of the operation of this phase comparator is that the comparison output 63 differs depending on the pulse width of the reference signal 62.

In other words, when noise is mixed into the synchronous separation signal, the noise output usually has a smaller pulse width than the synchronous signal, so it is applied to the comparison output 63. 4. This means that the drawbacks of the conventionally used phase comparator shown in FIG. 1 have been improved.

As mentioned above, the phase comparator shown in FIG. 1 determines the comparison output only by the phase relationship between the edge portions of the R and V signals, and therefore has no ability to discriminate between noise and synchronization signals. It can be seen that the phase comparator has greatly improved noise resistance. In order to make the phase comparator of the present invention operate optimally,
It is desirable to shape the pulse width of the vertical synchronizing signal to the same extent as that of the horizontal synchronizing signal using a demultiplexer or the like so that the phase comparison operation can be performed stably even during the vertical retrace period.

〔effect〕

According to the present invention, the phase comparator can be configured with a transmission gate that can be easily realized with C+MOS-C, and the number of elements is much smaller than in the past, making the horizontal synchronization system inexpensive and highly reliable. We can expect improvement.

Furthermore, since a noise elimination circuit is not particularly required for good noise resistance performance, the above-mentioned advantages are promoted and the synchronization performance of the television receiver is improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a conventional phase comparator, FIG. 2 is an operation timing diagram thereof, FIG. 6 is a block diagram of a horizontal synchronization circuit of a conventional television receiver, and FIG. 4 is a diagram of a horizontal synchronization circuit of the present invention. FIG. 5 is a block diagram showing an embodiment around the phase comparator, FIG. 6 is an operation timing diagram of the phase comparator, and FIG. 7 is a diagram showing control characteristics of the voltage controlled oscillator. 11... Reference signal input terminal only 12... Comparison signal input terminal V 13.1; 4... Output terminals U, D 31.41... Video signal input terminal 32.42... Synchronization separation circuit 33.45... Phase comparator 34... Charge pump 35.44... Low pass filter 36.45... Voltage controlled oscillator 57.46... Frequency divider 38.47... Timing signal output Terminal 51...Video signal input terminal 52...Amplitude separation transistor 53...Buffer 54...Signal input terminal 55...Control input terminal 56...Comparison signal input terminal 57...Output terminal 58 ... Comparison output terminal 61 ... Comparison signal 62 ... Reference signal 63 ... Comparison output or more

Claims (1)

[Claims] In the horizontal synchronization circuit of television equipment, the amplitude-limited composite synchronization signal and the pulse wave having a pulse width equal to or less than the horizontal synchronization signal generated from the output of the voltage controlled oscillator are input to the control input of the CMOS transmission gate. A horizontal synchronization circuit characterized in that a phase comparison operation is performed by applying voltage to a terminal and a signal input terminal.