JPS6186076A - Output control circuit of dc arc welder - Google Patents

Output control circuit of dc arc welder

Info

Publication number
JPS6186076A
JPS6186076A JP20637184A JP20637184A JPS6186076A JP S6186076 A JPS6186076 A JP S6186076A JP 20637184 A JP20637184 A JP 20637184A JP 20637184 A JP20637184 A JP 20637184A JP S6186076 A JPS6186076 A JP S6186076A
Authority
JP
Japan
Prior art keywords
output
output voltage
circuit
time delay
setting signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20637184A
Other languages
Japanese (ja)
Inventor
Osamu Nagano
修 長野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP20637184A priority Critical patent/JPS6186076A/en
Publication of JPS6186076A publication Critical patent/JPS6186076A/en
Pending legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K9/00—Arc welding or cutting
    • B23K9/06—Arrangements or circuits for starting the arc, e.g. by generating ignition voltage, or for stabilising the arc
    • B23K9/073—Stabilising the arc
    • B23K9/0731—Stabilising of the arc tension

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Arc Welding Control (AREA)

Abstract

PURPOSE:To execute a stable welding which scarcely causes a spatter in the whole current range by providing a time delay element in an operating circuit for outputting an output current setting signal, and varying the time delay quantity continuously in proportion to an absolute value of an output voltage setting signal. CONSTITUTION:In case an output voltage setting signal es is small, an output ez of an adding and amplifying circuit becomes comparatively small. Therefore, an integration circuit 35 copes with a sudden variation (at the time of a short circuit) of an output voltage feedback signal evf by ez and a time delay determined by a resistance 31 and a capacitor 32. As a result, a rise characteristic of an output current becomes comparatively steep. On the other hand, in case when es is large (in case an average output current is large), ez becomes comparatively large. Therefore, the integration circuit 35 copes with the sudden variation of the output voltage feedback signal evf by this comparatively large ez and the time delay determined by the resistance 31 and the capacitor 32. As a result, the rise characteristic of the output current becomes comparatively gentle. In this way, a stable welding is executed by changing continuously ez of one factor for determining the time delay of the integration circuit, in accordance with an absolute value of the output voltage setting signal es.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はＭ−、ｉｔアーク溶接機の出力制御回路に関
し、特にシールドガスとして炭酸ガスを用いる短絡移行
アーク溶接を行なう消耗！極式ガスシールドアーク溶接
機の＃接↑１丁流の立上り特性を任意に制御する制御回
路に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to an output control circuit for an M-, IT arc welding machine, and in particular to a consumable welding process for short-circuit transfer arc welding using carbon dioxide gas as a shielding gas. This invention relates to a control circuit that arbitrarily controls the rise characteristics of #connection↑1-current in a polar type gas shielded arc welding machine.

〔従来の技術〕[Conventional technology]

従来、この棹の回路として、第２図に示すものがあった
０図ておいて、（１）は浴接）４−１変圧器等により構
成される直流電源装置、（２１は出力電流を制御するス
イッチング素子、（３）および（４）は出力端子、（５
）はコンタクトチップ、（６）はコンタクトチップによ
り給電される消耗電極（以下ワイヤという）、（７）け
アーク、（８）は被浴接物（旬下母材という）、（９）
は電流検出素子、αＧは出力電圧設定器、［１１１は演
算回路、（１ｚは増幅器、（ＩＪは増幅器ａ７Ｊの反転
入力端子と出力電圧設定器の摺動子間に接続された抵抗
器、■は出力端子（３）と増幅器ａ７Ｊの反転入力端子
間に接続された抵抗器、１１５）Ｆ′ｉ増幅器（１２１
の出力並子と反転入力端子間に接続された抵抗器、（１
６１は増幅器＋１２１の出力端子と反転入力端子間に接
続されたコンデンサ、（１７１は演算回路（１υの出力
信号と電流検出素子（９）の出力電流検出信号により出
力電流を制御する出力Ｎ流制御回路、０＆は出力電流制
御回路（■力からの信号を増幅してスイッチング素子（
２）を駆動する駆動回路である。Conventionally, the circuit for this pole was as shown in Figure 2. (1) is a DC power supply device consisting of a 4-1 transformer (21 is a bath terminal), and (21 is a circuit for output current) Switching elements to be controlled, (3) and (4) are output terminals, (5
) is the contact tip, (6) is the consumable electrode (hereinafter referred to as wire) that is powered by the contact tip, (7) is the arc, (8) is the object to be bathed (hereinafter referred to as base material), (9)
is a current detection element, αG is an output voltage setter, [111 is an arithmetic circuit, (1z is an amplifier, (IJ is a resistor connected between the inverting input terminal of the amplifier a7J and the slider of the output voltage setter, is a resistor connected between the output terminal (3) and the inverting input terminal of amplifier a7J, 115) F′i amplifier (121
A resistor is connected between the output terminal and the inverting input terminal of (1
61 is a capacitor connected between the output terminal and the inverting input terminal of the amplifier +121, (171 is an arithmetic circuit (output N current control that controls the output current by the output signal of 1υ and the output current detection signal of the current detection element (9) circuit, 0& is the output current control circuit (■ amplifies the signal from the force and connects the switching element (
2).

次に動作について説明する。出力市圧設定器００からの
出力電圧設定信号ｅ３と出力電圧帰還信号ｅｖｆとが増
幅器＋１５で比較増幅される。比較増幅された増幅器１
７Ｊの出力信号ｅｙ□と出力電流検出素子（９）からの
出力電流信号ｅｉｆとを出力Ｍｉｍ制御回路（１７１で
漬方、′Ａ／行い、出力信号ｅｖｏに対応した出力電流
信号ｅｉｆが常に得られるような信号ｅｉｏを駆動回路
１１）に伝える。駆動回路１１’Ｄでは上記信号ｅｉｏ
Ｋ対応してスイッチング素子（２）を、駆動する。スイ
ッチング素子（２）が０Ｎ−ＯＦＦを繰返すことＫより
、直流電源回路（１）からスイッチング素子１２）、出
力端子ｆ３）、コンタクトチップ（５）、ワイヤ（６）
、アーク（７）、母材（８）、出力端子（４）、出力電
流検出素子（９）、そして直流電源回路（１１の順に出
力電流が流れる。上記出力電流は出力［流検出素子（９
）により、出力電流信号ｅｉｆとして、出力［流制御回
路關に帰還され制御さｒる。ところで、出力電流設定信
号は演算回路Ｕυの出力信号ｅｖｏである。出力信号ｅ
ｖｏはアーク状態の変化に関係なく出力電圧帰還信号ｅ
ｖｆが一定になるように（出力■圧設定信号ガが一定の
場合）動作する。この為、出力端子（３）と（４１間の
電圧は負荷の状嬰に変化なく一定になるようになる。し
かし、ワイヤ（６１と母材（８）が短絡した場合には、
瞬時的に大電流を流して一定電圧になるように制御回路
が動作すれば、ワイヤ（６）Ｋ必要以上の大電流が流れ
る為に、ワイヤ（６）が四方に飛散する（以下この飛散
金属をスパッタという）。この為、短絡開放直後のワイ
ヤ（６１先端と母材（８）間の距離（以下この距離をア
ーク長という）が長くなり、アーク切れを発生するなど
のアーク不安定の原因となる。またスパッタも母材（８
）に付着して取除くことが困難な場合が多い。そこで、
演算回路１１υ内に時間遅れ１子（コンデンサｌｌ６１
）を接続することにより、出力電圧帰還信号”ｖｆの急
激な変動に７、Ｊして出力信号ａｙ□が時間遅れをもっ
て対応するようにしている０この為出力電流もワイヤ（
６）と母材（８）が短絡することにより、急激に増力口
するのではなく、ゆるやかに増加する。その出力電圧帰
還信号６ｖｆと出力電圧設定信号ｅＬ　　出力信号ｅｖ
０、出力電流Ｉの関係を第６図に示すＯ 〔発明が解決しようとする問題点〕 従来の直流アーク溶接機の出力制御回路は以上のように
構成されていた。ところで、ワイヤ（６１と母材１８）
が短絡した場合の出力電流の変化率は、小雷浦域での変
化率の方が大￥ＩＬ流域での変化率よりも大きい方が、
全市帽域でアークが安定でし力Ｓもスパッタの発生が少
ないとされている。し〃）シ、従来回路では出力電流の
う・化率は一定なので、小１ｉｔｉ域でアークが安定す
るようにコンデンサ（１６１を設にすｎ、ば、大電流域
では多量のスノ＜・ツタを発生し、大富加域でアークが
安定するようにコンデンサ（１６１を設定すれば、小ｆ
ｌｆ流域でアークが不安定となると言う問題点があった
。Next, the operation will be explained. The output voltage setting signal e3 from the output voltage setting device 00 and the output voltage feedback signal evf are compared and amplified by the amplifier +15. Comparison amplified amplifier 1
7J's output signal ey A signal eio such as that shown in FIG. In the drive circuit 11'D, the above signal eio
The switching element (2) is driven in response to K. Since the switching element (2) repeats ON-OFF, the DC power supply circuit (1) to the switching element 12), the output terminal f3), the contact chip (5), and the wire (6)
, the arc (7), the base metal (8), the output terminal (4), the output current detection element (9), and the DC power supply circuit (11).The output current flows through the output [current detection element (9)].
), the output current signal eif is fed back to the output current control circuit and controlled. By the way, the output current setting signal is the output signal evo of the arithmetic circuit Uυ. Output signal e
vo is the output voltage feedback signal e regardless of changes in arc condition.
It operates so that vf is constant (when the output pressure setting signal is constant). Therefore, the voltage between the output terminals (3) and (41) remains constant regardless of the load condition. However, if the wire (61) and the base metal (8) are short-circuited,
If the control circuit operates to instantaneously flow a large current and maintain a constant voltage, the wire (6) will be scattered in all directions (hereinafter referred to as this scattered metal) because a larger current than necessary will flow through the wire (6). is called sputter). For this reason, the distance between the tip of the wire (61) and the base metal (8) (hereinafter referred to as arc length) becomes long immediately after the short circuit is opened, causing arc instability such as arc breakage.Also, spatter Also base material (8
) and are often difficult to remove. Therefore,
There is one time delay element (capacitor ll61) in the arithmetic circuit 11υ.
), the output signal ay□ responds to sudden fluctuations in the output voltage feedback signal ``vf'' with a time delay. Therefore, the output current is also connected to the wire (
6) and the base material (8), the power increases gradually instead of rapidly. Its output voltage feedback signal 6vf and output voltage setting signal eL output signal ev
0, and the relationship between the output current I and the output current I is shown in FIG. By the way, the wire (61 and base material 18)
The rate of change in the output current when there is a short circuit is that the rate of change in the Koraipo area is larger than the rate of change in the IL area.
The arc is stable in the entire city area, and the force S is said to cause less spatter. In the conventional circuit, the rate of corrosion of the output current is constant, so a capacitor (161) is installed to stabilize the arc in the small current range. If the capacitor (161) is set so that the arc is stabilized in the Otomi area, a small f
There was a problem that the arc became unstable in the lf region.

この発明は、上記のような従来のものの問題点を解決す
るためになさねたもので、時間遅れ量を出力電流に対応
して変化することにより、全軍帽範囲でスパッタの少な
い安定な溶接ができる直流アーク溶接機の出力制御回路
な提供することを目的としている。This invention was made to solve the problems of the conventional methods as described above, and by changing the time delay amount in accordance with the output current, stable welding with less spatter can be achieved over the entire military cap range. The purpose is to provide an output control circuit for a DC arc welding machine that can be used.

〔問題点を解決するための手段〕[Means for solving problems]

この発明に係るｉｃ済アーク溶接機の出力制御回路は、
出力電圧の帰還信号と出力電圧設定器の設定信号とを比
較増幅して出力電流設定信号を出力する演算回路内に時
間遅れ要素を設け、かつ、この時間遅れ要素によって決
定する時間遅れ量を、出力電圧設定信号の絶対値に比例
させて連続的に変化させたものである。The output control circuit of the IC arc welding machine according to the present invention is as follows:
A time delay element is provided in an arithmetic circuit that compares and amplifies the feedback signal of the output voltage and the setting signal of the output voltage setter and outputs the output current setting signal, and the amount of time delay determined by this time delay element is The output voltage is continuously changed in proportion to the absolute value of the output voltage setting signal.

〔作用〕 この発明においては、出力電圧設定値（すなわち、短絡
時の出力’ＩＩ　Ｒｌｉｔ！　）の変化によって、上記
演算回路の積分回路内の時間遅れが変化するようにした
から、出力電流の立上り特性をそれぞれの出力型、館に
対して連続的に最も適正な値とすることができる。した
がって、全溶接電流範囲において、スパッタの少ない安
定した溶接が可能となる。[Function] In this invention, the time delay in the integrating circuit of the arithmetic circuit is changed by a change in the output voltage setting value (that is, the output 'II Rlit! at the time of short circuit), so that the rise of the output current is The characteristics can be continuously set to the most appropriate value for each output type and facility. Therefore, stable welding with less spatter is possible in the entire welding current range.

〔実施例〕〔Example〕

以下、この発明の一実施例を説明する。第１図はこの発
明の一実施例を示すブロック図であり、１２Ｉ］〜（２
）は抵抗器、Ｃ２３Ｆｉ増幅器、ｃ！４は比較増幅回路
、（ハ）〜＠Ｖ′ｉ抵抗器、（至）は増幅器、囚は加算
増幅回路、（７）は緩衝増幅器（バッファ）、（３１）
、（至）は抵抗器、ｏａはコンデンサ、＠は増幅器、（
ト）は積分［自回路である。An embodiment of this invention will be described below. FIG. 1 is a block diagram showing an embodiment of the present invention.
) is a resistor, C23Fi amplifier, c! 4 is a comparison amplifier circuit, (c) ~@V'i resistor, (to) is an amplifier, (5) is a summing amplifier circuit, (7) is a buffer amplifier (buffer), (31)
, (to) is a resistor, oa is a capacitor, @ is an amplifier, (
g) is an integral [self-circuit].

なお、第２１ン１と同一部分には同一符号を付して示し
である。Note that the same parts as in the 21st unit 1 are designated by the same reference numerals.

次に動作について説明する。出力電圧設足器（１０１か
らの出カフｉ＋’圧設定信号ｅ３と出力電圧帰還信号ｅ
ｖｆとが比較増幅回路０４１で比較増幅される。次に、
比較増幅回路１シ４）の出力信号ｅｚと緩衝増幅器ｃＢ
の出力ｅｙ（８３に冴しい）とが加算増幅回路（２！１
によって加算増幅され、加算増幅回路の出力ｅ２として
出力される。ｅｚは積分回路（至）によって積分され、
ｅｇｏとして出力される。Next, the operation will be explained. Output voltage footer (output cuff i+' pressure setting signal e3 from 101 and output voltage feedback signal e
vf is compared and amplified by a comparison amplification circuit 041. next,
Output signal ez of comparison amplifier circuit 1shi4) and buffer amplifier cB
The output ey (83) is added to the summing amplifier circuit (2!1
The signals are summed and amplified by the summing amplification circuit and outputted as the output e2 of the summing amplification circuit. ez is integrated by the integration circuit (to),
Output as ego.

なお、比較増幅回路（２４１、積分回路（至）、加算増
幅ｌｉ：Ｉｌ路ｉｌｌ及びバッファ（７）によって、出
力電圧帰還信号ｅＶｉｓ　　出力電圧設定信号ｅ８とを
比較増幅して出力゛ｔバ流股定信号ｅｙ□を出力する演
算回路（１１ａ）が偶成される。In addition, the output voltage feedback signal eVis and the output voltage setting signal e8 are compared and amplified by the comparison amplifier circuit (241, the integration circuit (to), the addition amplifier li:Il path ill, and the buffer (7), and the output An arithmetic circuit (11a) that outputs a constant signal ey□ is constructed in conjunction.

ここで、各信号の符号をｅＢ＜　ｔＬ　ｅｖｆ＞Ｏｔ　
ｅｚ＞（Ｌｅｙ＞　Ｏ・ｅ　ｚ　＞　０＋　　ｅｖｏ＞
　０とし、ｅｙ□が大きくなれば出力電流■も大きくな
るものとする。また、ｅＢの絶対値１ｅ８１を大きく設
定した時、短終時の出力電流も大きくなるものとする。Here, the sign of each signal is eB<tL evf>Ot
ez>(Ley>O・e z>0+ evo>
0, and as ey□ increases, output current ■ also increases. It is also assumed that when the absolute value 1e81 of eB is set large, the output current at the short end also becomes large.

ｅＢが小さい場合（短絡時の出力電流が小きい場合）に
は、ｅｚは比較的小さくなる。このため、積分回路□□
□は、ｅｚ及び抵抗０穀及びコンデンサ０擾によって決
定される時間遅ｊで、出力１ｈ′圧帰還信号ｅｖｆの急
激な変動（−ｆなわち短絡時のこと）に対応する。この
ため、出力電流の立上り！陽性は比較的急峻になる。一
方、ｅＢが大きい場合（平均出力電流が大きい場合）に
はｅｚＦｉ比較的大きくなる。そこで、積分回路０！９
はこの比較的大きなｅ７及び抵抗０１及びコンデンサ０
４によって決定される時間遅れ（比較的大＾い）で、出
力電圧帰還信号ｅｖｉの急激な変動に対応する。When eB is small (when the output current at the time of short circuit is small), ez becomes relatively small. For this reason, the integrator circuit □□
□ is a time delay j determined by ez, resistance 0, and capacitor 0, and corresponds to a sudden change in the output 1h' pressure feedback signal evf (-f, that is, at the time of short circuit). Therefore, the output current rises! The positivity becomes relatively steep. On the other hand, when eB is large (when the average output current is large), ezFi becomes relatively large. Therefore, the integral circuit 0!9
is this relatively large e7, resistor 01 and capacitor 0
4 (relatively large) to accommodate sudden fluctuations in the output voltage feedback signal evi.

このため、出力電流の立上り特性は比較的ゆるやかにな
る。このように、積分回路の時間遅れを決定する因子の
１つであるｅ２を、出力電圧設定信号ｅ８の絶対値１ｅ
、１に応じて連続的に変えることにより、全電流域でス
パッタの少ない安定した浴接が可能になる。Therefore, the rise characteristic of the output current becomes relatively gentle. In this way, e2, which is one of the factors that determines the time delay of the integrating circuit, is set to the absolute value 1e of the output voltage setting signal e8.
, 1, stable bath welding with less spatter is possible in the entire current range.

〔発明の効果〕〔Effect of the invention〕

この発明は以上説明したとおり、出力電圧帰還信号と出
力電圧設定信号とを比較増幅して出力電流設定信号を出
力する演算回路内に時間遅れ要素なハ（？け、か一つ、
この時間遅ハ要素によって決定する時ｌ′ｉｉｌ遅れ蕾
を、出力電圧設定信号の絶対値に比例させて連１セ的に
変化させたから、出力′１流の立上り特性をそれぞれの
出力ｉ！Ｉｆ流に対して連続的に最も適正な値とするこ
とができる。したがって、全溶接ｗ加範囲において、ス
パッタの少ない安定した溶接が可能である。As explained above, this invention includes a time delay element in the arithmetic circuit that compares and amplifies the output voltage feedback signal and the output voltage setting signal and outputs the output current setting signal.
Since the time l'iil lag determined by this time delay element is changed in series in proportion to the absolute value of the output voltage setting signal, the rise characteristics of the output '1 current are changed for each output i! It is possible to continuously set the most appropriate value for the If flow. Therefore, stable welding with less spatter is possible in the entire welding range.

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの発明の一実楕例を示すブロック図、第２図
は従来の直流アーク溶接装五イを示すブロック１ヱ１、
第６１聞は出力電圧設定信号ｅ８．出力電圧帰還信号ｅ
ｙｆ＋　　出力電流設定信号ｅｖｏおよび出カ電澹Ｉと
の関係を示す線図である。 図において、（１）・・・直ｆＡｆ　’＝Ｊｉ源装瞳、
（２）・・・スイッチング素子、（９）・・・出力電流
検出集子、Ｃｌ０１・・・出力１１［圧設定器、０υ、
　（１１ａ）・・・演算回路、ａｎ・・・出力電流制御
回路、１１印・・・駆動回路、ｃ４）・・・比較増幅回
路、四・・・加算増幅回路、（至）・・・積分回路、ｅ
Ｂ・・・出力電圧設定信号、ｅｖｆ・・・出力電圧帰還
信号、ｅｖｏ・・・出力電流設定信号である。 なお、図中同一符号は同−又は相当部分を示す。FIG. 1 is a block diagram showing an example of the present invention, and FIG. 2 is a block diagram showing a conventional DC arc welding device.
The 61st episode is the output voltage setting signal e8. Output voltage feedback signal e
yf+ is a diagram showing the relationship between the output current setting signal evo and the output current I. In the figure, (1)...Direct fAf'=Ji Genso Hitomi,
(2)...Switching element, (9)...Output current detection collector, Cl01...Output 11 [pressure setting device, 0υ,
(11a)...Arithmetic circuit, an...Output current control circuit, 11 mark...Drive circuit, c4)...Comparison amplifier circuit, 4...Additional amplifier circuit, (to)...Integrator circuit, e
B: Output voltage setting signal, evf: Output voltage feedback signal, evo: Output current setting signal. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims] 出力電圧を帰還制御する直流アーク溶接機の出力制御回
路において、出力電圧の帰還信号と出力電圧設定器の設
定信号とを比較増幅して出力電流設定信号を出力する演
算回路内に時間遅れ要素を設け、かつ、この時間遅れ要
素によって決定する時間遅れ量を、出力電圧設定信号の
絶対値に比例させて連続的に変化させることを特徴とし
た直流アーク溶接機の出力制御回路。In the output control circuit of a DC arc welding machine that feedback-controls the output voltage, a time delay element is installed in the arithmetic circuit that compares and amplifies the feedback signal of the output voltage and the setting signal of the output voltage setting device and outputs the output current setting signal. An output control circuit for a DC arc welding machine, characterized in that the time delay amount determined by the time delay element is continuously changed in proportion to the absolute value of an output voltage setting signal.
JP20637184A 1984-10-03 1984-10-03 Output control circuit of dc arc welder Pending JPS6186076A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20637184A JPS6186076A (en) 1984-10-03 1984-10-03 Output control circuit of dc arc welder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20637184A JPS6186076A (en) 1984-10-03 1984-10-03 Output control circuit of dc arc welder

Publications (1)

Publication Number Publication Date
JPS6186076A true JPS6186076A (en) 1986-05-01

Family

ID=16522217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20637184A Pending JPS6186076A (en) 1984-10-03 1984-10-03 Output control circuit of dc arc welder

Country Status (1)

Country Link
JP (1) JPS6186076A (en)

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