JPS6182261A - Transfer control system - Google Patents

Abstract

PURPOSE:To improve the data transfer capability of a multiplexer channel by constituting the processing time required for data transfer to be constant independently of the transfer byte width. CONSTITUTION:The transfer byte width (m) in a microprogram is set to a byte request register 7 to apply initializing processing of a local counter 8 and setting of a byte counter register 9. When data is transferred with an input/ output device 12-i, the count of the local counter 8 is counted up at each 1 byte transfer, compared with a value of the byte request register 7 and when they are coincident, the next transfer processing request CHREQ is issued to the microprogram and the value of the byte counter register 9 is decreased by the count of the local counter 8. The byte counter is referenced at the microprogram side to prepare for the next transfer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a channel processing method, and includes 1. In particular, the present invention relates to a transfer control system that can transfer data between an input/output device and a channel using an arbitrary number of bytes, and can simplify channel processing.

[Prior art and problems]

In a multiplexer channel, the number of bytes transferred in one connection with an I/O device may be one or several bytes, depending on the type of I/O device. The transfer control procedure in a conventional multiplexer channel is 1
When a byte is transferred, the next transfer request is generated, and when the transfer request is recognized, the byte count value is updated and the next transfer data is set or stored. When the number of transferred bytes is several bytes, the transferred data is temporarily stored and the above processing procedure is repeated for each byte. Therefore, since the processing time for one input/output device increases in proportion to the transfer byte width, the influence on the multiplexer channel cannot be ignored.

In particular, microprogram-controlled multiplexer channels lead to an increased number of running steps. Furthermore, even when input/output devices with various byte widths are connected to one multiplexer channel, processing is basically performed with one byte width, so the performance of the multiplexer channel will be lower than that of the input/output devices with wide byte widths. will be limited by.

This problem occurs because the multiplexer channel is not aware of the data transfer width of the input/output device.

[Purpose of the invention]

The present invention is based on the above consideration, and by making the processing time required for data transfer (excluding the time required for actual data transmission and reception with the input/output device) constant regardless of the transfer byte width, The purpose is to improve the data transfer capability of multiplexer channels.

[Means for Achieving the Object] Therefore, the transfer control method of the present invention is a transfer control method for an input/output system comprising a memory, a multiplexer channel, and a plurality of input/output devices, A channel has a local counter that counts the number of bytes to and from an input/output device in a single connection, a byte request register that specifies the number of bytes transferred during a connection, and a byte request register to which the byte count value is set. a counter register, a turnout cover sofa, a comparing means for comparing the value of the byte request register and the value of the local counter and issuing a processing request when the two match; and a means for subtracting the value of the byte counter register by the value of the local counter when the processing request is issued. The device is characterized in that it is configured to perform data transfer.

[Embodiments of the invention]

FIG. 1 is a schematic diagram of a multiplexer channel. In Figure 1, 1 is a memory, 2 is a multiplexer channel, 3-1 and 3-2 are subchannels, 4 is a microprocessor, 5-1 and 5-2 are buffers, and 6 is an input/output bus sofa. There is. Multiplexer channel 2 has subchannels 3-1 and 3-2 and a microprocessor 4. Although only two subchannels are shown, there are as many subchannels as there are input/output devices. Subchannel 3-1 is buffer 5-
1, and subchannel 3-2 has buffer 5-
It has 2. The microprocessor 4 controls the entire multiplexer channel 2. The human output buffer 6 temporarily holds data to be sent to the input/output device or data sent from the input/output device.

FIG. 2 is a diagram showing the configuration of one embodiment of the present invention.

In Figure 2, 7 is the byte request register;
8 is a local counter, 9 is a byte counter register, 10 is a comparator, 11 is a subtracter, 12-1 is an input/output device, and 13 is a gate. Code 6.
7. 8. 9.10. IL 13. is present in multiplexer channel 2.

The input/output bath sofa 6 is composed of n+1 parts. The requested transfer byte width is set in the byte request register 7. The local counter 8 counts the number of bytes transferred to and from the input/output device 12i. Byte counter register 9 contains subchannel 3.
The value of the byte counter in -i is set. The comparator 10 issues a processing request CHRE to the channel (microprogram) when the value of the local counter 8 matches the value of the byte request register 7. The subtracter 11 subtracts the value of the local counter 8 from the value of the byte counter register 9 when a processing request CI (REQ) is issued, and sets it in the byte counter register 9 again. .Every time 1 byte of data is sent to the human output buffer 6 or every time 1 byte of data is sent from the input/output buffer 6 to the input/output device 12-1, the count amplifier instruction signal UP changes to "1".
”, and the value of local counter 8 is counted up. In the case of READ, when a processing request CIIREQ is issued, the data in the input/output buffer 6 is stored in the memory 1 via the buffer 5-i of the subchannel 3-i under the control of the microprogram of the microprocessor 4. Ru. In case of WRITE, processing request CIIREQ
is issued, under the control of the microprocessor 4,
The data in memory 1 is transferred to buffer 5- of subchannel 3-4.
i and stored in the input/output bath sofa 6.

Next, the operation of the embodiment shown in FIG. 2 will be explained.

When the input/output device 12-1 with a transfer byte width of m bytes is activated, the microprogram determines the corresponding subchannel 3-i and transfers the transfer bytes held in the subchannel 3-i. Width m is a byte request.
Cent in register 7.

At the same time, the local counter 8 is initialized and the byte counter register 9 is set. Input/output device 12
-1, the value of local counter 8 is counted up every time 1 byte is transferred.
It is compared with the value of the byte request register 7, and if they match, the next transfer processing request CIIREQ is issued to the microprogram. Also, the value of byte counter register 9 is decremented by the value of local counter 8.

On the microprogram side, processing request CIII? When the E port is recognized, the input/output device 12-j and subchannel 3-i that issued the processing request CHRHQ are determined, and the byte counter value in the subchannel 3-i is referred to.

If the byte counter value is smaller than the transfer byte width of the input/output device 12-1, a new hide request is written to the hide request register 7, preparations are made for the next transfer, and the hide counter value is The value is input/output device 12-
If it is larger than the transfer hide width of 1, input/output bag ff12
The transfer hide width m of i is set to hide request register 7 to prepare for the next transfer. Also, in the case of READ commands, the MicroProgera J simultaneously transfers data from the input/output bus sofa 6 to the subchannel 3.
-i, and then performs processing to send it to memory 1. In the case of a WRITE command, simultaneously sends the data in memory 1 to buffer 5-i of subchannel 3-4, After that, processing for storing the data in the input/output bath sofa 6 is performed. Furthermore, the microprogram also performs chain data processing and the like when a processing request CIIRRQ is issued.

[Effects of the Invention] As is clear from the above description, according to the present invention, even when multiple bytes of data are transferred by one connection with an input/output device, processing on the microprogram side is performed at the start of the transfer or at the same time. Because it only needs to be done once at the end, processing time can be shortened.
The transfer capacity of multiplexer channels can be improved.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an outline of a multiplexer channel, and FIG. 2 is a diagram showing the configuration of one embodiment of the present invention. ]...Memory, 2...Multiplexer channel,
3-1 and 3-2... subchannel, 4... microprocessor, 5-1 and 5-2... buffer, 6...
Input/output bath sofa, 7... byte request register, 8... local counter, 9... hide counter register, 10 river comparator, 11... subtractor,
12-1... Input/output device, 13... Gate.

Claims (1)

[Claims] A transfer control method in an input/output system comprising a memory, a multiplexer channel, and a plurality of input/output devices, wherein the multiplexer channel counts the number of bytes with the input/output device in one connection. A local counter, a byte request register that specifies the number of bytes transferred when combining, a byte counter register to which a byte count value is set, an input/output buffer, and the value of the byte request register. Comparing means for comparing the value of the local counter and issuing a processing request when the two match; and subtracting means for reducing the value of the byte counter register by the value of the local counter when the processing request is issued. A transfer control method, comprising: a transfer control system configured to transfer data between the input/output buffer and the memory via a subchannel when the processing request is issued.