JPS6175639U - - Google Patents

Info

Publication number
JPS6175639U
JPS6175639U JP15909284U JP15909284U JPS6175639U JP S6175639 U JPS6175639 U JP S6175639U JP 15909284 U JP15909284 U JP 15909284U JP 15909284 U JP15909284 U JP 15909284U JP S6175639 U JPS6175639 U JP S6175639U
Authority
JP
Japan
Prior art keywords
frequency
programmable counter
oscillator
voltage
phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15909284U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15909284U priority Critical patent/JPS6175639U/ja
Publication of JPS6175639U publication Critical patent/JPS6175639U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
JP15909284U 1984-10-19 1984-10-19 Pending JPS6175639U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15909284U JPS6175639U (enExample) 1984-10-19 1984-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15909284U JPS6175639U (enExample) 1984-10-19 1984-10-19

Publications (1)

Publication Number Publication Date
JPS6175639U true JPS6175639U (enExample) 1986-05-21

Family

ID=30717054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15909284U Pending JPS6175639U (enExample) 1984-10-19 1984-10-19

Country Status (1)

Country Link
JP (1) JPS6175639U (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7508897B2 (en) 2004-06-15 2009-03-24 Sharp Kabushiki Kaisha PLL circuit and high-frequency receiving device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53145511A (en) * 1977-05-25 1978-12-18 Matsushita Electric Ind Co Ltd Digital tuning control circuit
JPS58182328A (ja) * 1982-04-20 1983-10-25 Toshiba Corp シンセサイザ受信機の受信周波数制御装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53145511A (en) * 1977-05-25 1978-12-18 Matsushita Electric Ind Co Ltd Digital tuning control circuit
JPS58182328A (ja) * 1982-04-20 1983-10-25 Toshiba Corp シンセサイザ受信機の受信周波数制御装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7508897B2 (en) 2004-06-15 2009-03-24 Sharp Kabushiki Kaisha PLL circuit and high-frequency receiving device

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