JPS6174141U - - Google Patents

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Publication number
JPS6174141U
JPS6174141U JP15755784U JP15755784U JPS6174141U JP S6174141 U JPS6174141 U JP S6174141U JP 15755784 U JP15755784 U JP 15755784U JP 15755784 U JP15755784 U JP 15755784U JP S6174141 U JPS6174141 U JP S6174141U
Authority
JP
Japan
Prior art keywords
command
serial
parallel signal
terminal device
inputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15755784U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15755784U priority Critical patent/JPS6174141U/ja
Publication of JPS6174141U publication Critical patent/JPS6174141U/ja
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本考案の実施例による端末装置のブ
ロツク図、第２図は、計算機から送信されるコマ
ンドの内容を示すブロツク図である。 １０…計算機、２０…端末装置、２１…シリア
ル／パラレル信号変換器、２２…コマンド認識部
、２３…ウオツチドツグタイマ、３０…シリアル
通信ライン。 FIG. 1 is a block diagram of a terminal device according to an embodiment of the present invention, and FIG. 2 is a block diagram showing the contents of commands sent from a computer. DESCRIPTION OF SYMBOLS 10... Computer, 20... Terminal device, 21... Serial/parallel signal converter, 22... Command recognizer, 23... Watchdog timer, 30... Serial communication line.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 計算機とシリアル通信ラインで接続されて通信
を行なう端末装置において、前記計算機から送信
されたコマンドに対応したシリアル信号を入力し
このシリアル信号をパラレル信号に変換するシリ
アル／パラレル信号変換器と、このシリアル／パ
ラレル信号変換器から出力されたパラレル信号よ
り前記コマンドを認識し前記コマンドが設定時間
変更の内容を持つコマンドであると前記コマンド
に付随するデータを出力するコマンド認識部と、
前記データを入力しクロツクを計数して所定の計
数値になつた時に警報を出力するウオツチドツグ
タイマとを備える端末装置。 A terminal device that is connected to a computer via a serial communication line to perform communication includes a serial/parallel signal converter that inputs a serial signal corresponding to a command sent from the computer and converts the serial signal into a parallel signal; /a command recognition unit that recognizes the command from a parallel signal output from a parallel signal converter and outputs data accompanying the command if the command has content of changing a set time;
A terminal device comprising a watchdog timer that inputs the data, counts clocks, and outputs an alarm when a predetermined count value is reached.
JP15755784U 1984-10-18 1984-10-18 Pending JPS6174141U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15755784U JPS6174141U (en) 1984-10-18 1984-10-18

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15755784U JPS6174141U (en) 1984-10-18 1984-10-18

Publications (1)

Publication Number Publication Date
JPS6174141U true JPS6174141U (en) 1986-05-20

Family

ID=30715547

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15755784U Pending JPS6174141U (en) 1984-10-18 1984-10-18

Country Status (1)

Country Link
JP (1) JPS6174141U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5578347A (en) * 1978-12-08 1980-06-12 Hitachi Ltd Operation monitor system of microprocessor
JPS5812057A (en) * 1981-07-15 1983-01-24 Mitsubishi Electric Corp Control system for electronic computer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5578347A (en) * 1978-12-08 1980-06-12 Hitachi Ltd Operation monitor system of microprocessor
JPS5812057A (en) * 1981-07-15 1983-01-24 Mitsubishi Electric Corp Control system for electronic computer

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