JPS6168664A - Method for establishing input/output device address - Google Patents

Abstract

PURPOSE:To utilize effectively an input/output device address register which is provided to the channel adaptor of an input/output control device by providing freedom in setting the input/output device address seen from the host device. CONSTITUTION:set an input/output device address register at the channel adaptor of an input/output control device 2 which is connected to a host processing device 1. When an initial program is loaded to the input/output control device 2, the input/output address register corresponding to the input/output device address to the actually used is set to '1' at the input/output control device 2 which is connected to host processing device 1. after that, the completion of setting of input/output device address is informed to a channel device 11 by asynchronous interruption means.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data processing system comprising at least a host processing device equipped with a channel device and an input/output control device using a plurality of input/output device address groups. In the system,
The present invention relates to a method for setting the above input/output device address group from a channel device to an input/output control device.

Conventionally, in a data processing system consisting of a host processing device equipped with a channel device and an input/output control device etc. that uses a plurality of input/output device address groups, when the host processing device issues an input/output command, , based on the command information from the channel device, always set the address of the input/output device to be controlled in the input/output device address register provided in the channel adapter in the input/output control device, and execute the input/output processing. was running.

At this time, each input/output control device (e.g., communication control device) has only 11 input/output device address registers, so when constructing the system, each individual It is necessary to allocate the address of the input/output device to the input/output device address register of each input/output control device, but since this is difficult in reality, it is possible to set the input/output device address with a degree of freedom from the host processing device's perspective. A method was awaited.

[Conventional technology]

FIG. 4 is a diagram illustrating the concept of a conventional input/output device address setting method.

In this figure, 1 is a host processing device, 11 is a channel device, 2 is an input/output control device (for example, a communication control device), 2
1 is a channel adapter, and 211 is an input/output device address register that sets the address of the input/output device (line) controlled by the input/output control device. Although there are usually multiple I/O device addresses available.

One input/output device address register 211 provided in the channel adapter 21 of the input/output control device 2 has multiple addresses, so it is necessary to set the lowest address and highest address of the input/output device to be used. , a method is used in which the range (indicated by diagonal lines) is set as the valid address.

Therefore, even if the addresses of the input/output devices actually used are not consecutive, when the channel device 11 is connected to the input/output control device 2, the input/output device address register 211 It was necessary to ensure continuity.

[Problem that the invention seeks to solve]

In the conventional system as described above, there is a limit to the number of input/output devices that can be connected to one channel device 11.
Once a range of addresses to be used by one channel device 11 is set, the addresses connected to the same channel device 11,
In other input/output control devices, since the input/output devices corresponding to the input/output device addresses in the above range cannot be used, the number of input/output device addresses is restricted, and as a result, the other input/output control devices 2 This had the disadvantage of limiting the number of input/output devices that could be connected to the system.

In view of the above conventional drawbacks, the present invention provides flexibility in setting input/output device addresses from the perspective of the host processing device 1, and effectively uses the input/output device address register provided in the channel adapter of the input/output control device. The purpose is to provide a method.

[Means for solving problems]

The purpose of this is to provide, in addition to the original initial program loading information, multiple input/output device addresses, each consisting of a pair of start and end addresses, and their valid values when the host processor loads the initial program to the input/output control device. means for transferring input/output device address information consisting of control information indicating a number as information of a write initial program loading command; and in the human output control device, setting the input/output device address information in an input/output device address register. In this case, in one input/output device address area, the addresses from the first address to the last address salt are consecutive, but the addresses between the input/output device address areas are discontinuous, and any plurality of input/output device address groups can be used. After setting the means to allocate and the above input/output device address,
For the above channel device, by an asynchronous interrupt,
This is achieved by the input/output device address setting method of the present invention, which includes means for notifying completion of the setting.

[Effect]

That is, according to the present invention, an input/output device address register is provided in the channel adapter 21 of the input/output control device 2 connected to the host processing device 1, and an initial program loading from the host processing device 1 to the input/output control device 2 is performed. When performing the input/output control device 2 connected to the host processing device
After setting the input/output device address register corresponding to the actually used input/output device address to 1, the setting of the input/output device address is completed by an asynchronous interrupt means to the channel device 11. Since the channel device 1 is designed to notify
When executing input/output processing using commands from 1,
Access the above input/output device address register with the address of the input/output device to be controlled, and if the content is 1, it will be used as a command for the own device, and if it is 0°, it will be used as a command for another input/output control device. As a result, the degree of freedom when setting input/output device addresses is increased for the input/output device address register, which is provided only once for each input/output control device, and efficient input/output device address setting is possible. There is an effect that the method can obtain.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram showing a general configuration of a data processing system to which the present invention is applied, and FIG. 2 is a diagram showing a schematic configuration of a data processing system to which the present invention is applied. FIG. 3, which is a diagram showing an example of information, is a block diagram showing an embodiment of the present invention.

In this embodiment, as shown in FIG. 1, it is assumed that the channel device 11 of the host processing device 1 is connected to two input/output control devices.

A method of setting an input/output device address in the input/output device address register provided in the channel adapter 21 in the input/output control device 2 by carrying out the present invention will be described below in order.

■First, during initial program loading (hereinafter referred to as IPL), each input/output control device 2 is
``Write-IPL'' using the physical address that it has.
In addition to the conventional IPL information, input/output device address information actually used by the channel device 11 is newly transferred to the channel adapter 21 by a control command such as "Command".

The format of the IPL information is shown in FIG. 2, where 3 indicates the entire IPL information, 31 the input/output device address information, and 32 the original IPL information. 311 is control information for the input/output device address information 31, which is composed of the number of valid bytes and a flag bit indicating validity/invalidity of the user's output device address information, and when the flag bit is valid, the present invention is executed. The input/output device address is set, and if it is invalid, the input/output device address is set using the conventional method. 312 is input/output device address information corresponding to each input/output device to be controlled, and is composed of a start address and a final address for each of the input/output device address groups NO, O to the last.

■In the input/output control device 2, the input/output device address information 31 is temporarily transferred to the channel adapter 21 shown in FIG.
The data is stored in a data buffer 212 provided in the internal memory.

At this time, the original IPL information 32 is subjected to the conventional IPL processing, and the "Write-IPL command" is
to end.

■After this, the input/output control device 2 transfers the data buffer 2
The input/output device address information 31 stored in the input/output device 12 is read out, and the first address of the input/output device address group (NO, 1~) corresponding to each input/output device to be controlled is set in the address register 213. Access the output device address register 211 and set the bit position to °1, and at the same time send the address to the control unit 210 (
Import using the route shown in a).

■Next, read the final address of the input/output device address group N001, and send it to the control unit 21 via the route shown in (b).
0, and it is determined whether or not it matches the address that previously accessed the input/output device address register (that is, the leading address in the first operation). If they do not match, the previous address is incremented by 1, stored in the address register 213, and input/output device address register 2
11 and sets the bit position to 1.

(2) From then on, repeat the same operation and add 1 to the previous address set in the address register 213 until it matches the final address of the input/output device address group N011 stored in the control unit 210.
, accesses the input/output device address register 211, and sets the bit to °1.

■If the above +1 address matches the final address, it indicates that the setting of the input/output device address for the relevant input/output device address group N061 is completed, so the number of effective bytes of the control information 311 is extracted from the data buffer 212. It operates by reading it out via route (b), adding -1, and returning it to the data buffer 212.

■Therefore, in the control section 210, as the next operation,
The control information 311 of the input/output device address information 31 is transmitted from the data buffer 212 through the route (b).
The number of valid bytes is determined, and if the number of valid bytes ≠ 0, this indicates that there are more input/output device addresses to be set. The operation is repeated until =O.

■When the number of valid bytes is exhausted, it indicates that all input/output device address settings have been completed, so the input/output control device 2 notifies the channel device 11 that the input/output device address settings have been completed. Notification is made by asynchronous interrupt means.

Incidentally, until the setting of all input/output device addresses is completed, the above-mentioned "Write-IPL" from the channel device 11 is
In response to an access to the input/output control device 2 that has received a "command", it responds with a "busy" status.

■The channel device 11 recognizes that the setting (initialization) of the input/output device address in the input/output control device 2 is completed by the asynchronous interrupt from the input/output control device 2, and thereafter issues read/write commands. It is issued to a plurality of input/output control devices 2 to start normal operation.

[Phase] Since all input/output device address settings have been completed, the input/output control device 2 will now use the channel device 11 as described above.
The address for read/write commands etc. from is routed (
C) in the address register 213, access the input/output device address register 211, and if the bit is 1, it will be used as a command to the own device, and if the bit is “Oo”, it will be used as a command to the other device. Works to recognize.

In such an input/output device address setting method, for each of the input/output control devices 2 connected to the channel device 11, each bead/output device address register 211 provided in each channel adapter is set. )
Since only the bit corresponding to the address of the input/output device to be controlled is set to "1", efficient input/output address setting is possible.

Also, from another channel device 11, the channel device 11
Even if you want to access an input/output device that is not controlled by , you can freely set the input/output device address.
The degree of freedom in setting input/output device addresses from the perspective of the host processing device 1 is improved.

〔Effect of the invention〕

As explained above in detail, the input/output device address setting method of the present invention is such that the input/output device address register is provided in the channel adapter 21 of the input/output control device 2 connected to the host processing device 1, and When performing initial program loading from device 1 to input/output control device 2,
In the input/output control device 2 connected to the host processing device 1, after setting the input/output device address register corresponding to the actually used input/output device address to “1,” an asynchronous interrupt is sent to the channel device 11. Since the device is configured to notify that the setting of the input/output device address is completed by the means, when executing input/output processing by a command from the channel device 11, the address of the input/output device to be controlled is Access the input/output device address register above and if its content is “1”,
If it is a command for the own device, and if it is “0”, it can be recognized as a command for another input/output control device, and as a result, the input/output device address register, which is provided only once for each input/output control device, will be This has the effect of increasing the degree of freedom in setting output device addresses and providing an efficient input/output device address setting method.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a general configuration of a data processing system to which the present invention is applied. FIG. 2 is a diagram showing an example of information transferred when the present invention is implemented and initial program loading is performed from a host processing device. FIG. 3 is a block diagram showing one embodiment of the present invention. FIG. 4 is a diagram explaining the concept of a conventional input/output device address setting method. In the drawings, 1 is a host processing device, and 11 is a channel device. 2 is an input/output control device, and 21 is a channel adapter. 210 is a control unit. 211 is an input/output device address register. 212 is a data buffer, and 213 is an address register. 3 is the entire formant of 1ptt# report. 31 is input/output device address information. 32 is IPL information, and 311 is control information. 312 are the start and end addresses of the input/output device address group NO.1. Kaya +ffl zo 2 prisoners

Claims (1)

[Claims] In a data processing system consisting of a host processing unit equipped with a channel device and an input/output control unit that uses multiple input/output device addresses, the original program is loaded from the host processing unit to the input/output control unit. In addition to the initial program loading information, input/output device address information consisting of a plurality of input/output device addresses with a start address and a final address as a pair, and control information indicating the effective number of the input/output device addresses is sent to the write initial program loading command. A means of transmitting information,
In the input/output control device, when setting the input/output device address information in the input/output device address register, in one input/output device address area, the addresses from the first address to the last address are continuous, but the The input/output device address areas are discontinuous, and means for allocating a plurality of arbitrary input/output device address groups, and after the setting of the input/output device addresses is completed, an asynchronous interrupt is sent to the channel device, An input/output device address setting method comprising: means for notifying completion of the setting.