JPS6162999A - Abnormality alarm - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] -1 - The present invention receives an abnormality detection signal from an abnormality detector installed at each location of a production line, etc. Relates to abnormality alarm devices that generate audio signals.

[Prior Art] Conventionally, in production lines such as assembly processes, for example, when a worker forgets to tighten a specified number of screws at a screw tightening work site and a shortage occurs (1), An abnormality warning device is used in which an abnormality detector detects this and generates an audio abnormality warning in response to the abnormality alarm to notify the operator.

However, this type of audio output abnormality warning device is limited to the well-known ADPCM (
There is a ROM that stores audio data analyzed using adaptive differential encoding) or PARCOR (universal autocorrelation coefficient method), and audio data is read from this ROM, demodulated, synthesized, and converted into an analog signal. Output J8 sound chassis component circuit and predetermined control programmer 11
A CPU that reads and transfers data from the ROM and performs speech synthesis using this data based on
It was constructed using a so-called micro combi coater.

Therefore, the use of CPUs, etc. makes the circuits more complex, and on production lines where noise is more likely to enter, the CPU is more likely to malfunction due to the influence of noise.
Furthermore, if it becomes necessary to change the number of alarms or the contents of the messages, the contents of the ROM that stores the programs and voice data of the messages must be changed, which requires complicated work and a lot of time. There was a cost issue.

[Object of the invention] The present invention has been made in view of the above points, and
By configuring it so that it can perform processing such as reading audio data from the ROM and performing voice synthesis without using the ROM,
In addition to being less susceptible to the effects of noise, even when the number of alarms or messages change, it is possible to easily deal with short-term delays, making it an ideal abnormality alarm system for use on production lines, etc. The purpose is to provide

= 3 - [Structure of the Invention] For this purpose, the present invention provides an input circuit that inputs abnormality detection signals sent from a plurality of abnormality detectors and outputs a digital signal indicating the input system, and features of an alarm sound. A plurality of storage means for storing parameters as audio data for each alarm message, and a chip select signal and an address signal are sent to the storage means corresponding to the signals upon receiving a digital signal from an input circuit, and the audio data is output from the storage means. It is configured to include a controller that controls reading, and a voice synthesis circuit that inputs and decodes the voice data sent from the storage means, synthesizes the voice for alarm, and outputs it as an analog signal.

[Example] Embodiments of the present invention will be described below based on the drawings.

Figure 1 shows a block diagram of an abnormality alarm device used on a production line, etc., and 2 is an input circuit connected to multiple input terminals 01 to l)n, consisting of an encoder, latch circuit, priority selection circuit, etc. generates a digital signal indicating the input system according to the input signal input from the input terminal,
Output this signal. ;If input No. 18 is input to multiple input terminals at the same time, the digital signal of the input system with the highest priority is output to each input terminal based on the preset priority order (1). In addition, input terminals D1 to Dn
The output line from the 1c Tatsumi normal alarm device is connected to each location on the production line, and the input terminals D1 to Dn are the relay contact outputs of the abnormality detector, that is, the on/off status between the input terminal and ground. The input signal is composed of
Reduces the influence of noise entering from the input terminal.

4 is an FPROM (erasable/removable 4i
An EPROM 4 consisting of n ICs corresponding to each input system of input terminals D1 to Dn is installed in an easily replaceable read-only memory. Each of these EPROM'l has
Audio messages for abnormal alarms depending on the supported input system,
is memorized one by one, and an alarm message such as "Phase 1 (= I H culm is defective fτ1") is stored in the known
DI] Analyzed by the CM method and written in advance as audio data. In addition, the alarm message is ADPC
By writing using the M method, a smaller memory capacity can be used.

In this way, each EPROM 4 stores one alarm message for each abnormal location. Reference numeral 6 denotes a controller that inputs a digital signal indicating an abnormal location sent from the input circuit 2 and sends a chip select signal and an address signal to the EPROM 4 corresponding to this signal, and controls reading of audio data from the EPROM 4. This controller 6 does not randomly access the necessary audio data from the ROM and transfer read data like a CPU, but instead sends a select signal to the designated EPROM 4.
In order to read data sequentially from the address, it is sufficient to always output address signals sequentially to the EPROM 4, and it can be constructed from a simple logic circuit. 8 is a speech synthesis circuit that takes in the audio data read from the EPROM 4I, decodes the audio data encoded by the ADPCM method, and synthesizes speech; 10 is a low-pass connected to the output side of the speech synthesis circuit 8; 12 is an amplifier, and 14 is a speaker. Further, 16 is a clock oscillator which applies a clock pulse signal of a constant frequency to the controller 6 and the voice synthesis circuit 8.

Next, the operation of the abnormality alarm device having the above configuration will be explained.

When an abnormality detector placed at various locations such as a production line detects an abnormality, on/off signals are sent to the corresponding input terminals D1 to [)n. The input circuit 2 outputs a digital signal corresponding to the input system to which this abnormality detection signal is input, that is, a digital signal indicating the abnormality detection location. This digital signal is generated while the input signals of the input terminals D1 to Dn continue, and if the abnormality detection signals are input from the input terminals D1 to [)n of two systems at the same time, the Selects an input signal from an input terminal and outputs a digital signal corresponding to that input system. The digital signal output from the input circuit 2 is sent to the controller 6, and the controller 6 sends a chip select signal to one EPROM 4 corresponding to this digital signal, and also sends an address signal in order from address O. For example, 10~
Read every 20m5. The audio data read out from the EPROM 4, that is, the encoded signal in which a predetermined alarm message is encoded, is sent to the audio synthesis circuit 8, and the audio synthesis circuit 8 decodes this encoded signal to synthesize audio. Ru. Then, the analog voice synthesis signal output from the voice synthesis circuit 8 hl is sent to the amplifier 12 via the low-pass filter 10, amplified, and input to the speaker 14.
An alarm message such as "The first assembly process is defective in assembly" is issued. This message is continuously and repeatedly generated while the abnormality detection signal is input to the input terminal, and continues until the end of the message even if the abnormality detection signal disappears in the middle of the voice.

Next, a circuit example specifically representing the above abnormality alarm device is shown in FIG. 2 and briefly described.

In the figure, 21 to 28 are negative circuits, and when an abnormality is detected on the production line, Nli is activated.

In order to output a signal of "h" level, the input terminal is set to =
8 - Normally, a predetermined voltage is applied via a resistor R.

Further, an abnormality is detected in the production line 30, and f'I''ioh J is detected from one of the negative circuits 21 to 28.
When a level signal is output, the input information is 4 b
A conversion circuit for converting it into binary information is shown, and the binary information output from this conversion circuit 30 is output to the D flip 70 knobs 31 to 33 and the NAND circuit 34, respectively. It should be noted that the output terminals Oo to 02 of the Juki conversion circuit 30 are connected to the D flip-flops 31 to 33.
1, a signal indicating which part of the production line is abnormal is output, and a signal indicating whether or not an abnormality has occurred on the production line is output from the output terminal 03 connected to the NAND circuit 34. Ru. Then, an address signal is output to the EPROM 4 to one input terminal of the NAND circuit 34.
The address signal output circuit 35 is connected to the reset terminal of the address signal output circuit 35, and a signal is input to indicate that there is no abnormality on the production line and that no abnormality alarm is currently being issued by voice. Therefore, the output terminal of the NAND circuit 34 is set to the rLOWJ level only when an abnormality signal from the production line is input to the conversion circuit 30 when no abnormality alarm is issued, and the output terminal is set to the rLOWJ level through the NAND circuit 37 connected to this output terminal. A clock is output to the clock terminal C of the D flip-flops 31 to 33, and each D flip-flop 31
A signal representing an abnormal location on the production line is outputted from 33 to 33.

Next, 38 and 39 represent NAND circuits, and the -1 input terminals of the 8-way NAND circuits 38 and 39 are connected to the reset terminal of the address signal output circuit 35 via a negative circuit 40. Output terminals Q and Q of the D flip-flop 33 are connected to the other terminals of the D flip-flop 33, respectively. Further, 41 and 42 are EPR signals outputted from the D flip-flops 31 to 33 indicative of an abnormal location in the production line.
This is a chip select signal generation circuit for outputting a chip select signal to OM4 and selecting an EPROM in which a predetermined alarm message is stored.

Furthermore, 43 represents an LSI for speech synthesis, and the selected E
A conversion circuit 44 converts the audio data stored in the PROM 4.
and synthesizes it into an audio signal. Here, the conversion circuit 44 converts the 8-bit audio data output from the F P ROM 4 into 4-bit binary coded data. Further, 45 is an oscillation element made of crystal, which outputs a clock pulse signal of a predetermined frequency. The audio signal synthesized by the audio synthesis LSI is transmitted to the amplifier circuit 12 and the low-pass filter 10, which are mainly composed of transistors TRI and TR2 and an operational amplifier OP1.
The signal is output to the speaker 14 via the amplification and filter circuit 46 corresponding to , and an alarm message is output.

In FIG. 2, the input circuit 2 is a negative circuit 2.
1 to 28 and the input system of the conversion circuit 3o, and the controller 6 includes D flip-flops 31 to 33, a NAND circuit 34, and an address signal output circuit 35.
, NAND circuits 37 to 39 and chip select signal generation circuits 41 and 42.

As explained above, in the abnormality alarm device of this embodiment, a plurality of E
Since each FPROM 4 stores one alarm message as audio data, when changing the content of the message, the corresponding FP
All you have to do is replace the ROM and convert, making the work easier.

[Effects of the Invention] As explained above, according to the abnormality alarm device of the present invention,
An input circuit that inputs abnormality detection signals sent from multiple abnormality detectors and outputs digital signals according to the signals, and a plurality of input circuits that store characteristic parameters of alarm sounds as audio data for each alarm stage. a controller that receives a digital signal from an input circuit and sends a chipset signal and an address signal to the storage means corresponding to the signal and controls reading of audio data from the storage means; The first configuration includes a voice synthesis circuit that inputs and decodes voice data, synthesizes a voice for alarm, and outputs the synthesized voice as an analog signal.

J: So, because the readout of audio data is controlled using a logic circuit controller without using a CPU, the production line is prone to noise, so any production site will be affected by the noise generated from the production line. In addition, the circuit structure can be simplified and manufactured at low cost. Furthermore, since each type of alarm audio data is stored in multiple storage means,
When a change in message occurs, it can be easily and quickly dealt with by simply replacing the corresponding storage means.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an abnormality warning device showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing the abnormality warning device of FIG. 1 in more detail.

Claims (1)

[Claims] An input circuit that inputs abnormality detection signals sent from a plurality of abnormality detectors and outputs digital signals according to the signals; a controller that receives a digital signal from the input circuit, sends a chip select signal and an address signal to the storage means according to the signal, and controls the reading of audio data from the storage means; An abnormality alarm device comprising: a voice synthesis circuit that inputs and decodes voice data sent from the means, synthesizes a voice for alarm, and outputs the synthesized voice as an analog signal.