JPS6162915A - Position correction system for coordinate input device - Google Patents

Abstract

PURPOSE:To increase a processing speed and to increase the number of connectable input devices by cascading an origin correcting circuit and a full- scale correcting circuit and obtaining a position-corrected coordinate signal from their output terminal. CONSTITUTION:A coordinate input device 1 inputs a pattern handwritten on its input surface 10 with a pen 11 to a controller 3 as a coordinate signal. This controller 3 converts said coordinate signal into an image signal and sends it to an image display device 2, thereby displaying said pattern on its display screen 20. An adding circuit 12 and a coefficient circuit 15 are provided for the correction of the coordinate position, and a corrected signal x3 is generated from the offset signal vc by a variable resistance VR and the X-coordinate signal x1 of the input position on said input surface 10 and outputted. Consequently, input to the origin Oi is made with a pen 11 during initial calibration, and said variable resistance VR is adjusted so that the cursor display C coincides with the origin Od. Further, a full-scale point Fi is inputted with the pen 11 and a variable resistance (r) is adjusted so that the input point coincides with a full-scale point Fd.

Description

[Detailed description of the invention] The present invention relates to a position correction method for a coordinate input device.

When a pattern such as a character or figure inputted from an input surface of a coordinate input device is sent to an output device for reproduction and output, position correction is performed to obtain a single cover pattern at a desired position and size.

□FIG. 1 is a block diagram for explaining a position correction method for a coordinate input device. The coordinate input device 1 generates an electric signal (coordinate signal) indicating the coordinates of a handwritten input location according to a pattern handwritten on the input surface 10 with a pen 11, and sends this to the control device 3. The control device 3 converts the coordinate signal into an image signal and sends it to the image display device 2 to display an image of the human covert on the display surface 20. In this case, the coordinate signal generated when inputting to the origin Oi (or full-scale point Fi) on the input surface 10 and the coordinate signal to be displayed at the origin Od (or full-scale point Fd) on the display surface 20 are usually used. Since this is different from the signal, it is necessary to correct the position so that they match.

In the conventional position correction method for a coordinate input device, this position correction is performed by a processor built in the control device 3. At the time of initial calibration, after specifying the initial calibration mode by operating a switch (not shown) or the like, first, input is made to the origin O1 of the input surface 10 with the pen 11 as shown by the broken arrow A. The processor in the control device 3 compares the digital coordinate signal sent at this time with the digital coordinate signal for displaying the origin opening on the display surface 20, and generates a digital offset signal indicating the difference between the two. generated and stored in memory. Next, the digital offset signal is added (or subtracted) to the digital coordinate signal sent when inputting to the full-scale point Fi on the input surface 10 with the pen 11, and this and the full-scale point Fd on the display surface 20 are calculated. A digital signal that indicates the ratio between the digital coordinate signal and the
Generate a coefficient signal and store it in memory. When specifying the input mode, the processor in the control device 3 first adds (or subtracts) the digital offset signal read from the memory to the digital coordinate signal sent in response to the input to the input surface 1°, and Next, the addition (or subtraction) result is multiplied by a digital coefficient signal to create a position-corrected digital coordinate signal. The control device 3 converts the coordinate signal after the position correction into an image signal and sends it to the image display device 2. By performing position correction in this way,
For example, when a cursor C is displayed on the display surface 20, if an input is made to the origin O1, the display position of the cursor C will be moved to the origin as shown by the dashed arrow B, and if an input is made to the full scale point Pi. , the cursor display C moves to the full scale point Fd, and the output pattern is displayed at the desired position and size.

However, in such conventional position correction methods for coordinate input devices, the processing speed is slow because the position correction is performed by arithmetic processing in the processor in the control device 3; Since the coordinate input devices 1 are stored in the memory in the control device 3, when a plurality of coordinate input devices 1 are connected to the control device 3, a memory capacity corresponding to the number of coordinate input devices 1 is required, and there is a drawback that there is a limit to the number of devices that can be connected.

An object of the present invention is to provide a position correction method for a coordinate input device that eliminates the above-mentioned drawbacks, has a high processing speed, and does not impose a limit on the number of input devices that can be connected to a control device.

The method of the present invention includes a first variable means for varying the voltage of a first electrical signal indicating the shift amount of the origin during origin calibration, and a voltage of the received signal is shifted by the voltage of the first electrical signal. an origin correction circuit having an addition circuit for transmitting, a second variable means for varying a coefficient indicating an expansion rate of coordinates during full scale calibration, and a coefficient circuit for multiplying the voltage of a received signal by the coefficient and transmitting the multiplied value. a full-scale correction circuit having a cascade connection of the origin correction circuit and the full-scale correction circuit, a coordinate signal indicating the input coordinates to the coordinate input device is provided to the input end thereof, and a coordinate signal whose position is corrected is output from the output end thereof; It has a configuration that sends out.

Next, the present invention will be described in detail with reference to the drawings.

FIG. 2 is a circuit diagram showing a first embodiment of the present invention. The signal X1 is the input point X to the input surface 10 in FIG.
It is an analog signal of voltage proportional to the coordinates. variable resistance v
R is a manual potentiometer, which is provided to obtain an offset signal of a voltage Vc intermediate between DC voltages +V and -■. The adding circuit 12 is an analog adding circuit in which a resistor R is connected in series to one input terminal of the operational amplifier 13, and another resistor R is connected between the input terminal and the output terminal. That is, the adder circuit 12 sends a signal, which is an analog signal of the voltage obtained by subtracting the voltage of the signal X from the voltage Vc, to the coefficient circuit 15. The coefficient circuit 15 includes an operational amplifier 1
1 is an amplifier circuit in which a resistor R is connected in series to one input terminal of 4, and a manual variable resistor r is connected between the input terminal and the output terminal. ) sends out a signal X, which is an analog signal with a voltage doubled.

The circuit of this embodiment is provided on the coordinate input device 1 side of FIG.
By connecting the signal XI indicating the X coordinate, and similarly connecting the signal indicating the is no longer necessary, and the input operator has to adjust the variable resistors Vu and r
Initial calibration can be performed at any time by adjusting . At the time of initial calibration, first, the origin Oi is input with the pen 11, and the variable resistance Vn of both circuits is adjusted so that the cursor display C coincides with the origin (support), thereby performing the origin initial calibration. Next, use Ben 11 to input the full scale point Fi and display the cursor C.
Initial full-scale point calibration is performed by adjusting the variable resistors r of both circuits so that Fd coincides with the full-scale point Fd.

The voltage of the signal X at the time of input is equal to the voltage obtained by subtracting the voltage Vc of the offset signal from the voltage of the signal X, multiplied by (r/R), and therefore the signal X is the signal X.

becomes an analog signal with position correction applied to it.

In this embodiment, position correction is performed immediately by analog signal processing, eliminating the need for arithmetic processing time as in the conventional case, and eliminating the need to provide a memory in the control device 3 to store data for position correction. , there is no longer a limit on the number of input devices that can be connected to the control device due to memory capacity constraints.

FIG. 3 is a circuit diagram showing another example of the configuration of the adder circuit 12 of this embodiment. In the circuit shown in the figure, a resistor R is connected in series to each of the two input terminals of the operational amplifier 13, another resistor R is connected between one input terminal and the output terminal, and the other input terminal is connected to the ground. This is an analog adder circuit with another resistor R connected between them. The voltage of the signal X3 sent out by this circuit is the value obtained by subtracting the voltage VC of the offset signal from the voltage of the signal XI.

FIG. 4 is a circuit diagram showing another example of the configuration of the coefficient circuit 15 of this embodiment. The circuit shown in the figure applies a signal voltage divided by a variable resistor VR to the input terminal of an amplifier 170 whose amplification degree is greater than 1, and sends out a signal X having a voltage proportional to the voltage of the signal voltage. The polarity in this circuit is determined by the adder circuit 12 connected to it.
It is sufficient to match the polarity of .

The first embodiment shows a case where the initial calibration is performed manually. However, if the degree of position correction between the input surface and the display surface is frequently changed during input, the initial calibration may be performed manually each time. It is troublesome to have to do this. In order to eliminate this trouble, initial calibration may be performed automatically.

An embodiment in which automatic initial calibration is performed will be described below.

FIG. 5 is a block diagram showing a second embodiment, which has a configuration in which a circuit for automatically setting an offset signal at the time of initial origin calibration is added to the addition circuit 12 of the first embodiment.

The switch SW is closed when specifying the origin initial calibration mode.
A circuit loop is formed for automatic setting of the offset signal. The signal X sent out by the adder circuit 12 is transmitted to the amplifier 21
After being amplified through the analog-to-digital converter (
A/b) 22 converts the signal into a digital signal and sends it to one input terminal of a comparator 23 as a signal input. The other input terminal of the comparator 23 receives a digital signal from the origin data generation circuit 24 that corresponds to the origin on the output surface, that is, indicates a zero value (for example, for displaying the origin country on the display surface 20 in FIG. 1). digital signals) are being sent. The comparator 23 compares both digital signals sent to both input terminals and sends out a pulse signal indicating the magnitude relationship between the two.

This pulse signal is applied to the switch S only during the initial home calibration.
It is sent to the correction data generation circuit 25 via W. In response to the pulse signal sent from the comparator 23, the correction data generation circuit 25 generates a digital signal whose value changes sequentially at a predetermined step width until the magnitude relationship indicated by the pulse signal is reversed. , which is sent to a digital-to-analog converter (D/A) 26. The D/A 26 converts the digital signal sent from the correction data generation circuit 25 into an analog signal, and sends this to the addition circuit 12 as an offset signal. As described above, when the magnitude relationship indicated by the pulse signal of the comparator 23 is reversed, the correction data generation circuit 25 stops changing the value of the digital signal,
The current value is held and sent. At this time, the value of the signal X2 substantially converges to zero, and the origin initial calibration is completed. In the input mode, the switch SW is opened and the circuit loop for automatic setting of the offset signal is opened, the voltage Vc of the offset signal maintains the value at the time of completion of the origin initial calibration, and the adder circuit 12 uses the signal X1 to set the origin. A position-corrected signal, that is, a signal X having a voltage equal to the voltage of the signal XI minus the voltage Vc of the offset signal (or the voltage of the signal X1 subtracted from the voltage Vc) is sent out.

FIG. 6 is a block diagram showing an example of the configuration of the correction data generation circuit 25 of this embodiment. Switch 8 during initial home calibration
The pulse signal sent from the comparator 23 via W is sent to the gate circuit 2B and the counter 27. The gate circuit 28 connects the pulse train of the clock signal to the counter 27 at the start of the origin initial calibration, and then interrupts the connection of the pulse train of the clock signal to the counter 27 when the magnitude relationship indicated by the pulse signal is reversed. Has a gate function. The counter 27 is an up/down counter that counts up or down the pulse train of the clock signal in the direction of reversing the magnitude relationship indicated by the pulse signal. A digital signal indicating the value of the count result of the counter 27 is sent to the D/A 26.

FIG. 7 is a block diagram showing a third embodiment, in which a voltage or data adjustment type coefficient circuit 16 is used in place of the manual adjustment type coefficient circuit 15 of the first embodiment, and a full scale point initial calibration is also performed. It has a configuration in which a circuit is added that automatically sets voltage Vg or data Dg that indicates a coefficient. The switch SW is closed during initial full-scale point calibration to form a circuit loop for automatic coefficient setting. This circuit loop operates in the same way as the circuit loop in the second embodiment at the time of full-scale point initial calibration, and automatically sets coefficients. That is, the signal X, which is a voltage obtained by multiplying the signal voltage by a factor, is converted into a digital signal by the A/D 22 and becomes the signal X.

The value of is the digital signal corresponding to the full scale point on the output surface sent from the full scale point data generation circuit 29 (for example, the full scale point Fd of the display surface 20 in FIG.
(digital signal for display). After convergence, the data signal, which is a digital signal sent by the correction data generation circuit 25, retains the value at the time of convergence. In the input mode, the switch 8W is open, the data C holds the value at the time of convergence, and the coefficient circuit 16 outputs the signal A signal x1, which is the voltage multiplied by a factor, is sent out. Therefore, the signal X becomes a signal subjected to the full scale point position correction of the signal XtK.

FIGS. 8(a) and Φ) are circuit diagrams each showing a configuration example of the coefficient circuit 16 of this embodiment. FIG. 3A shows a voltage adjustment type circuit, which is a coefficient circuit in which the source and drain of a field effect transistor Q are connected to one input terminal and output terminal of an operational amplifier 14. In this circuit, a voltage Vg is applied to the gate of the computer effect transistor Q,
The degree of amplification is changed by changing the resistance value between the source and drain depending on the value of voltage Vg. Note that the voltage Vg is the voltage of an analog signal sent from the D/A 26 in FIG. 8) is a data adjustment type circuit, and is a coefficient circuit in which both ends of a variable resistor 300 whose resistance value is varied by data adjustment are connected to one input end and output end of the operational amplifier 14. In this circuit, the output data D of the correction data generation circuit 25 is connected to the control terminal of the variable resistor 300.
The degree of amplification is changed by changing the resistance value between both ends of the variable resistor 300 depending on the value of the data Dg and the value of the data Dg, thereby eliminating the need for the D/A 26 shown in FIG.

FIGS. 9 and 10 are block diagrams showing fourth and fifth embodiments of the present invention, respectively, and both embodiments have a function of automatically performing full-scale point initial calibration. In the fourth embodiment shown in FIG. 9, an A/D 31 is used in place of the coefficient circuit 16 and A/D 22 in the third embodiment (Zenshō in FIG. 7), and the analog input terminal of the A/D 31 is A signal X2 is applied to the reference voltage input terminal of the A/D 310, and an offset signal of the voltage Vg is applied to the reference voltage input terminal of the A/D 310, and a signal X1 obtained by digitally converting the signal salt using the voltage Vg as the reference voltage is sent out and also sent to the comparator 23. Obviously, when the full-scale point initial calibration is completed, the value of the signal X and the value of the digital signal sent from the full-scale point data generation circuit 29 become substantially equal.

In the fifth embodiment shown in FIG.
Using the ν information 32 instead of the coefficient circuit 160 in the D/
Apply signal salt to the reference voltage input terminal of A32, and also
Data Dg is applied to the digital input terminal of 2, and a signal X3 obtained by converting the data signal into an analog signal using the voltage of the signal salt as a reference voltage is sent out and also sent to the A/D 22. Obviously, when the full-scale point initial calibration is completed, the value of the signal X3 and the value of the digital signal sent out by the full-scale point data generation circuit 29 become substantially equal.

If the adder circuit 12 of the second embodiment and the circuit of any one of the third to fifth embodiments are connected in series as in the first embodiment, initial calibration can be automatically performed. Thus, a position correction means is obtained. Note that the function of the comparator 22 and the correction data generation circuit 250 in the second to fifth embodiments, that is, the function of comparing the signal salt or X with the reference point (origin or full scale point) data, and the comparison result It is clear that the function of generating and storing correction data can also be realized by program control using a processor built into the coordinate input device.

As is clear from the above description, the present invention can realize a position correction method for a coordinate input device that has a faster processing speed than the conventional one and does not have the conventional limit on the number of input devices that can be connected to the control device. There is an effect.

[Brief explanation of drawings]

Fig. 1 is a block diagram for explaining a correction method for a coordinate input device, Figs. 2 to 4 are circuit diagrams showing an embodiment of the present invention, and Figs. 5 to 7 are circuit diagrams showing an embodiment of the present invention. FIGS. 8(a) and Φ) are circuit diagrams showing embodiments of the present invention, and FIGS. 9 and 10 are block diagrams showing embodiments of the present invention. 1... Coordinate input device, 10... Input surface, 11... Pen, 2... Image display device, 20... Display surface , 3...control device,
12...Addition circuit, 15.16...Coefficient circuit, 17.21...Amplifier, 22,31...
...Analog-digital converter (A/[)),
23...Comparator, 24...Origin data generation circuit, 25...Correction data generation circuit, 26
．． 32...Digital-to-analog converter (D/
'A). Agent: Susumu Uchihara, patent attorney, 7~. 1st Figure collection 2 Concave grass 3rgJ Brown 7 Figures (a) and b) $ 3
Illustration '7

Claims (7)

[Claims] (1) A first variable means for varying the voltage of a first electrical signal indicating the amount of shift of the origin during origin calibration, and an addition for shifting the voltage of the received signal by the voltage of the first electrical signal and transmitting it. a second variable means for varying a coefficient indicating a magnification rate of coordinates during full scale calibration, and a coefficient circuit for multiplying the voltage of a received signal by the coefficient and transmitting the multiplied coefficient. a correction circuit, the origin correction circuit and the full scale correction circuit are connected in cascade, a coordinate signal indicating the input coordinates to the coordinate input device is given to the input end thereof, and a position-corrected coordinate signal is sent from the output end thereof. A position correction method for a coordinate input device, characterized in that: (2) The position correction method for a coordinate input device according to claim 1, wherein the first variable means includes a variable resistor for varying the voltage of the first electric signal. (3) The position correction system for a coordinate input device according to claim (2), in which the variable resistor can be changed manually. (4) The position correction system for a coordinate input device according to claim (1), wherein the second variable means includes a variable resistor for varying the coefficient. (5) The position correction system for a coordinate input device according to claim (4), in which the variable resistor can be changed manually. (6) The first variable means includes a comparison means for comparing a value of a digital signal obtained by digitally converting the transmission signal of the addition circuit with a value of predetermined origin data, and a comparison means for comparing the value of the comparison means when performing the origin calibration. In response to the result, the voltage of the first electric signal is varied so that the value of the digital signal converges to the value of the origin data, and after the convergence, the voltage of the first electric signal at the time of convergence is changed. A position correction method for a coordinate input device according to claim (1), further comprising a control means provided with an offset signal generation means for maintaining the position of the coordinate input device. (7) The second variable means includes a comparison means for comparing a value of a digital signal obtained by digitally converting the transmission signal of the coefficient circuit with a value of predetermined full-scale point data, and a comparison means for comparing the value of the digital signal obtained by digitally converting the transmission signal of the coefficient circuit with the value of predetermined full-scale point data; coefficient generating means for varying the coefficients so that the value of the digital signal converges to the value of the full scale point data in response to a comparison result of the means, and for holding the coefficients at the time of the convergence after the convergence; Claim No. (1) having a control means provided with
Position correction method for coordinate input device described in Section 2.