JPS6162149A - メモリ制御装置 - Google Patents
メモリ制御装置Info
- Publication number
- JPS6162149A JPS6162149A JP59183926A JP18392684A JPS6162149A JP S6162149 A JPS6162149 A JP S6162149A JP 59183926 A JP59183926 A JP 59183926A JP 18392684 A JP18392684 A JP 18392684A JP S6162149 A JPS6162149 A JP S6162149A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- request
- data
- cache memory
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 title claims abstract description 197
- 238000012546 transfer Methods 0.000 claims description 14
- 238000011010 flushing procedure Methods 0.000 claims description 9
- 230000010365 information processing Effects 0.000 claims description 3
- 238000012545 processing Methods 0.000 abstract description 26
- 230000004048 modification Effects 0.000 abstract description 7
- 238000012986 modification Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 description 22
- 230000008569 process Effects 0.000 description 10
- 230000006870 function Effects 0.000 description 9
- 230000008859 change Effects 0.000 description 5
- 238000012797 qualification Methods 0.000 description 4
- 230000005764 inhibitory process Effects 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000001125 extrusion Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 241000209761 Avena Species 0.000 description 1
- 235000007319 Avena orientalis Nutrition 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000003116 impacting effect Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59183926A JPS6162149A (ja) | 1984-09-03 | 1984-09-03 | メモリ制御装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59183926A JPS6162149A (ja) | 1984-09-03 | 1984-09-03 | メモリ制御装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6162149A true JPS6162149A (ja) | 1986-03-31 |
JPH042978B2 JPH042978B2 (enrdf_load_stackoverflow) | 1992-01-21 |
Family
ID=16144224
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59183926A Granted JPS6162149A (ja) | 1984-09-03 | 1984-09-03 | メモリ制御装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6162149A (enrdf_load_stackoverflow) |
-
1984
- 1984-09-03 JP JP59183926A patent/JPS6162149A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH042978B2 (enrdf_load_stackoverflow) | 1992-01-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CA1124888A (en) | Integrated multilevel storage hierarchy for a data processing system with improved channel to memory write capability | |
US5319766A (en) | Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system | |
US7447845B2 (en) | Data processing system, processor and method of data processing in which local memory access requests are serviced by state machines with differing functionality | |
CN101446923B (zh) | 一种响应于指令而清洗高速缓冲存储器线的装置和方法 | |
US5388224A (en) | Processor identification mechanism for a multiprocessor system | |
EP2284712A2 (en) | Method of controlling a cache memory to increase an access speed to a main memory, and a computer using the method | |
JPS5936350B2 (ja) | キヤツシユ・アクセス方式 | |
US20080016278A1 (en) | Data Processing System, Processor and Method of Data Processing in which Local Memory Access Requests are Serviced on a Fixed Schedule | |
JPS62145340A (ja) | キヤツシユメモリ制御方式 | |
JP5499987B2 (ja) | 共有キャッシュメモリ装置 | |
US5471602A (en) | System and method of scoreboarding individual cache line segments | |
JPH03225542A (ja) | データ記憶方法及びビットエンコードデータの処理回路 | |
US7089364B2 (en) | System and method to stall dispatch of gathered store operations in a store queue using a timer | |
JP2004110240A (ja) | キャッシュメモリ装置 | |
JPS6162149A (ja) | メモリ制御装置 | |
US7356647B1 (en) | Cache with integrated capability to write out entire cache | |
KR100246864B1 (ko) | 제2캐시 메모리를 위한 캐시 플러시 방법 및 캐시 메모리를 갖춘 컴퓨터 메모리 시스템 | |
WO1994011828A2 (en) | Write buffer with full rank byte gathering | |
JPH0210446A (ja) | バッファ記憶装置 | |
JPH0353658B2 (enrdf_load_stackoverflow) | ||
JP2694076B2 (ja) | 記憶部制御装置 | |
JPS63247852A (ja) | キヤツシユメモリ制御方法 | |
JP2542284B2 (ja) | 緩衝記憶装置および緩衝記憶装置システム | |
JPH0644261B2 (ja) | マルチプロセッサシステムにおけるキャッシュ制御方式 | |
JPS60183652A (ja) | キヤツシユメモリ制御方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |