JPS6161588B2 - - Google Patents

Info

Publication number
JPS6161588B2
JPS6161588B2 JP55076444A JP7644480A JPS6161588B2 JP S6161588 B2 JPS6161588 B2 JP S6161588B2 JP 55076444 A JP55076444 A JP 55076444A JP 7644480 A JP7644480 A JP 7644480A JP S6161588 B2 JPS6161588 B2 JP S6161588B2
Authority
JP
Japan
Prior art keywords
drive circuit
charge
imaging device
solid
state imaging
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55076444A
Other languages
Japanese (ja)
Other versions
JPS573473A (en
Inventor
Kazuo Miwata
Kazuo Uehira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP7644480A priority Critical patent/JPS573473A/en
Publication of JPS573473A publication Critical patent/JPS573473A/en
Publication of JPS6161588B2 publication Critical patent/JPS6161588B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14825Linear CCD imagers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50Constructional details
    • H04N23/54Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Description

【発明の詳細な説明】 本発明は電荷結合撮像素子とそれの駆動回路と
を同一半導体基板に設けた構造の固体撮像装置に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a solid-state imaging device having a structure in which a charge-coupled imaging device and its driving circuit are provided on the same semiconductor substrate.

最近、フアクシミリあるいはテレビジヨン・カ
メラ等の撮像素子として電荷結合素子(以下
CCDという)を用いた固体撮像装置が使用され
ている。
Recently, charge-coupled devices (hereinafter referred to as charge-coupled devices) have been used as image sensors for facsimile and television cameras.
A solid-state imaging device using a CCD (CCD) is used.

従来、CCDを撮像素子として用いた固体撮像
装置は、CCDとそれの駆動回路とを同一半導体
基板に設けた構造になつている。駆動回路から見
たところのCCDの負荷容量は数百pFもあり、
CCDと駆動回路とを同一半導体基板に形成する
と、駆動回路が発熱源となつて、駆動回路の設置
場所の如何によつては半導体基板の温度分布を不
均一にする場合が起るという欠点があつた。
Conventionally, a solid-state imaging device using a CCD as an imaging element has a structure in which the CCD and its driving circuit are provided on the same semiconductor substrate. The load capacitance of a CCD as seen from the drive circuit is several hundred pF.
When a CCD and a drive circuit are formed on the same semiconductor substrate, the drive circuit becomes a heat source, and depending on where the drive circuit is installed, the temperature distribution on the semiconductor substrate may become uneven. It was hot.

第1図は従来の固体撮像装置の半導体基板部の
一例の平面図である。
FIG. 1 is a plan view of an example of a semiconductor substrate portion of a conventional solid-state imaging device.

第1図において、1は半導体基板、2は電荷結
合撮像素子、3は駆動回路のパルス発生部、4は
駆動回路のドライバー部である。一点鎖線は等温
線5を示す。このような配置にすると、等温線5
で示したように、駆動回路の後段部4の近傍の温
度が高くなり、後段部4から遠ざかるにつれて温
度が低くなり、電荷結合撮像素子部2の温度分布
が不均一になる。
In FIG. 1, 1 is a semiconductor substrate, 2 is a charge-coupled image pickup device, 3 is a pulse generation section of a drive circuit, and 4 is a driver section of the drive circuit. The dash-dotted line indicates isotherm line 5. With this arrangement, isotherm 5
As shown in , the temperature near the rear stage section 4 of the drive circuit increases, and the temperature decreases as the distance from the rear stage section 4 increases, and the temperature distribution in the charge-coupled image sensor section 2 becomes non-uniform.

電荷結合撮像素子2は、温度が上昇すると熱的
生成電荷、即ち暗電流が増加し、S/N比が減少
し、固体撮像装置の出力が不均一になるという欠
点があつた。
The charge-coupled image sensor 2 has the drawback that as the temperature rises, thermally generated charges, ie, dark current, increase, the S/N ratio decreases, and the output of the solid-state image sensor becomes non-uniform.

本発明は上記欠点を除き、駆動回路の後段部を
分散配置することにより、電荷結合撮像素子の温
度分布を均一にし、S/N比と出力の均一性とを
向上させた固体撮像装置を提供するものである。
The present invention eliminates the above-mentioned drawbacks and provides a solid-state imaging device in which the temperature distribution of the charge-coupled imaging device is made uniform and the S/N ratio and output uniformity are improved by distributing the rear part of the drive circuit. It is something to do.

本発明の固体撮像装置は、電荷結合撮像素子
と、パルス発生部とドライバー部とから成る駆動
回路とが形成された半導体基板を含む固体撮像装
置において、前記駆動回路のドライバー部を構成
する複数の同一構成の回路素子が、これら回路素
子の発熱による前記電荷結合撮像素子の温度分布
が均一になるように、前記電荷結合撮像素子の周
りに分散配置されて構成される。
A solid-state imaging device of the present invention includes a semiconductor substrate on which a charge-coupled imaging device and a drive circuit including a pulse generation section and a driver section are formed, wherein a plurality of semiconductor substrates forming a driver section of the drive circuit are provided. Circuit elements having the same configuration are distributed around the charge-coupled image sensor so that the temperature distribution of the charge-coupled image sensor due to heat generated by these circuit elements is uniform.

本発明を実施例により説明する。第2図は本発
明の一実施例の平面図、第3図は第2図に示す一
実施例の駆動回路の回路図、第4図は駆動回路の
動作を説明するための波形図である。
The present invention will be explained by examples. FIG. 2 is a plan view of an embodiment of the present invention, FIG. 3 is a circuit diagram of the drive circuit of the embodiment shown in FIG. 2, and FIG. 4 is a waveform diagram for explaining the operation of the drive circuit. .

第2図に示すように、駆動回路のドライバー部
4を構成する回路素子を10箇所に分散配置する。
4―1〜4―10は分散位置を示す。すなわち、
電荷結合素子2の周りに分散配置する。
As shown in FIG. 2, the circuit elements constituting the driver section 4 of the drive circuit are distributed at ten locations.
4-1 to 4-10 indicate dispersion positions. That is,
They are distributed around the charge coupled device 2.

駆動回路のドライバー部4を構成する回路素子
は、第3図において一点鎖線で囲んだ区域4―1
〜4―10で示したように分割する。駆動回路
は、P型半導体基板に設けられており、N型
MOSトランジスタを用いているものとする。駆
動回路のパルス発生部3は、デイプレツシヨン型
トランジスタQ1,Q3を用いたE/D型インバ
ーター2段(Q1,Q2)、(Q3,Q4)と、容
量C1,C2を用いたブートストラツプ型インバ
ーター2段(C1,Q5,Q6,Q7)、(C2,
Q8,Q9,Q10)との計4段の直列のインバ
ーター回路により形成され、ドライバー部4に必
要なクロツクφ1,φ2を発生させるものであ
る。一方、ドライバー部4では、直列に接続され
た2個のMOSトランジスタQ11,Q12より
なる同一の回路素子が、分散位置4―1〜4―5
で並列に接続されるとともに、分散位置4―6〜
4―10で並列に接続されている。このように分
散配置された各回路素子のMOSトランジスタQ
11のベースにはパルス発生部3で発生されるク
ロツクφ1が供給され、各回路素子のMOSトラ
ンジスタQ12のベースにはパルス発生部3で発
生されるクロツクφ2が供給される。
The circuit elements constituting the driver section 4 of the drive circuit are located in an area 4-1 surrounded by a dashed line in FIG.
~ Divide as shown in 4-10. The drive circuit is provided on a P-type semiconductor substrate and an N-type semiconductor substrate.
Assume that MOS transistors are used. The pulse generating section 3 of the drive circuit includes two stages of E/D type inverters (Q1, Q2) and (Q3, Q4) using depletion type transistors Q1 and Q3, and a bootstrap type inverter 2 using capacitors C1 and C2. Stages (C1, Q5, Q6, Q7), (C2,
It is formed by a total of four stages of serial inverter circuits including Q8, Q9, Q10), and generates the clocks φ1 and φ2 necessary for the driver section 4. On the other hand, in the driver section 4, the same circuit element consisting of two MOS transistors Q11 and Q12 connected in series is connected to distributed positions 4-1 to 4-5.
are connected in parallel, and at distributed positions 4-6~
4-10 are connected in parallel. MOS transistor Q of each circuit element distributed in this way
11 is supplied with the clock φ1 generated by the pulse generator 3, and the base of the MOS transistor Q12 of each circuit element is supplied with the clock φ2 generated by the pulse generator 3.

次に、パルス発生部3およびドライバー部4の
動作を、第4図の波形図を参照して説明する。パ
ルス発生部3は、入力φinに基づき位相が互いに
反転したクロツクφ1,φ2を発生する。いま、
時刻t1においてクロツクφ1がハイレベル、クロ
ツクφ2がローレベルにあるため、クロツクφ1
がゲートに供給される各回路素子のMOSトラン
ジスタQ11はオンし、クロツクφ2がゲートに
供給される各回路素子のMOSトランジスタQ1
2はオフとなるため、ドライバー部4の出力φ
outはハイレベル(電源電圧VDD)となる。逆
に、時刻t2においてはクロツクφ1がローレベ
ル、クロツクφ2がハイレベルにあるため、クロ
ツクφ1がゲートに供給される各回路素子の
MOSトランジスタQ11はオフし、クロツクφ
2がゲートに供給される各回路素子のMOSトラ
ンジスタQ12はオンとなるため、ドライバー部
4の出力φoutはローレベル(接地電位)とな
る。このようにドライバー部4は、プツシユプル
動作により各回路素子のMOSトランジスタQ1
1,Q12の両方が同時にオンすることなく、消
費電力を抑えた回路構成となつている。
Next, the operations of the pulse generating section 3 and the driver section 4 will be explained with reference to the waveform diagram of FIG. 4. The pulse generator 3 generates clocks φ1 and φ2 whose phases are inverted from each other based on the input φin. now,
At time t1 , clock φ1 is at high level and clock φ2 is at low level, so clock φ1
The MOS transistor Q11 of each circuit element whose gate is supplied with the clock φ2 is turned on, and the MOS transistor Q1 of each circuit element whose gate is supplied with the clock φ2 is turned on.
2 is off, so the output φ of the driver section 4
out becomes high level (power supply voltage V DD ). Conversely, at time t2 , clock φ1 is at low level and clock φ2 is at high level, so clock φ1 is applied to each circuit element to which the gate is supplied.
MOS transistor Q11 is turned off and clock φ
Since the MOS transistor Q12 of each circuit element to which 2 is supplied to the gate is turned on, the output φout of the driver section 4 becomes a low level (ground potential). In this way, the driver section 4 uses the push-pull operation to control the MOS transistor Q1 of each circuit element.
Both Q1 and Q12 are not turned on at the same time, resulting in a circuit configuration that suppresses power consumption.

以上の駆動回路は一例を説明したものであり、
使用トランジスタはN型MOSトランジスタに限
るものではなく、P型MOSトランジスタを用い
たものでもよい。また、その両方を用いたCMOS
で構成することも可能なことはもちろんである。
The above drive circuit is an example.
The transistors used are not limited to N-type MOS transistors, but may also be P-type MOS transistors. In addition, CMOS using both
Of course, it is also possible to configure

以上のように駆動回路のトライバー部を構成す
る回路素子を分散配置すると、第2図に等温線5
で示すように、電荷結合撮像素子2の温度分布が
均一となり、S/N比と出力の均一性とが向上す
る。
When the circuit elements constituting the tribar section of the drive circuit are distributed and arranged as described above, the isothermal line 5 is shown in Fig. 2.
As shown, the temperature distribution of the charge-coupled image sensor 2 becomes uniform, and the S/N ratio and output uniformity improve.

以上詳細に説明したように、本発明によれば、
S/N比と出力の均一性とを向上させた固体撮像
装置が得られるのでその効果は大きい。
As explained in detail above, according to the present invention,
The effect is significant because a solid-state imaging device with improved S/N ratio and output uniformity can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の固体撮像装置の半導体基板部の
一例の平面図、第2図は本発明の一実施例の平面
図、第3図は第2図に示す一実施例の駆動回路の
図面図、第4図は第3図に示す駆動回路の動作を
説明するための波形図である。 1……半導体基板、2……電荷結合撮像素子、
3……駆動回路のパルス発生部、4……駆動回路
のドライバー部、5……等温線。
FIG. 1 is a plan view of an example of a semiconductor substrate portion of a conventional solid-state imaging device, FIG. 2 is a plan view of an embodiment of the present invention, and FIG. 3 is a drawing of a drive circuit of the embodiment shown in FIG. 4 are waveform diagrams for explaining the operation of the drive circuit shown in FIG. 3. 1... Semiconductor substrate, 2... Charge-coupled image sensor,
3... Pulse generating section of the drive circuit, 4... Driver section of the drive circuit, 5... Isothermal line.

Claims (1)

【特許請求の範囲】[Claims] 1 電荷結合撮像素子と、パルス発生部とドライ
バー部とから成る駆動回路とが形成された半導体
基板を含む固体撮像装置において、前記駆動回路
のドライバー部を構成する複数の同一構成の回路
素子が、これら回路素子の発熱による前記電荷結
合撮像素子の温度分布が均一になるように、前記
電荷結合撮像素子の周りに分散配置されたことを
特徴とする固体撮像装置。
1. In a solid-state imaging device including a semiconductor substrate on which a charge-coupled image sensor and a drive circuit including a pulse generation section and a driver section are formed, a plurality of circuit elements having the same configuration constituting the driver section of the drive circuit, A solid-state imaging device characterized in that the solid-state imaging device is distributed around the charge-coupled image sensor so that the temperature distribution of the charge-coupled image sensor due to heat generated by these circuit elements is uniform.
JP7644480A 1980-06-06 1980-06-06 Solidstate image sensor Granted JPS573473A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7644480A JPS573473A (en) 1980-06-06 1980-06-06 Solidstate image sensor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7644480A JPS573473A (en) 1980-06-06 1980-06-06 Solidstate image sensor

Publications (2)

Publication Number Publication Date
JPS573473A JPS573473A (en) 1982-01-08
JPS6161588B2 true JPS6161588B2 (en) 1986-12-26

Family

ID=13605315

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7644480A Granted JPS573473A (en) 1980-06-06 1980-06-06 Solidstate image sensor

Country Status (1)

Country Link
JP (1) JPS573473A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5964977A (en) * 1982-10-05 1984-04-13 Nec Corp Solid state image pickup element
JPS59151455A (en) * 1983-02-18 1984-08-29 Hitachi Ltd Solid-state image pickup device
JPS60170364A (en) * 1984-02-15 1985-09-03 Toshiba Corp Reader
JPS63205949A (en) * 1987-02-23 1988-08-25 Sony Corp Semiconductor device
JPS62253275A (en) * 1987-03-31 1987-11-05 Olympus Optical Co Ltd Endoscope with built-in solid-state image pickup element

Also Published As

Publication number Publication date
JPS573473A (en) 1982-01-08

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