JPH01289381A - Amplifying type solid-state image pickup device - Google Patents

Abstract

PURPOSE:To reduce a fixed pattern noise by making it hard to receive the threshold voltage of an FET for amplification and the dispersion of an amplification factor and making it hard to receive the influence of the dispersion of the parasitic capacity of a photodiode while a current mirror circuit is used as an amplifying element. CONSTITUTION:The title device has a serial circuit to serially connect a switch means T3 and a photodiode D controlled by time series scanning pulses G1 to G6. One edge of a serial circuit is connected to a first common terminal 2, other edge of the serial circuit is connected to a reference current terminal 5 of the current mirror circuit 4 and the common terminal of the current mirror circuit 4 is connected to a second common terminal 3. Consequently, since a signal charge accumulated at the photodiode flows through the reference current terminal of a switching means and a current mirror circuit, the current in accordance with the current ratio of the current mirror circuit flows at the output terminal of the current mirror circuit. For the output signal charge, the influence of the threshold voltage and the amplification factor of an FET for amplification is not present and the influence of the dispersion of the parasitic capacity of the photodiode is not also received. Thus, a fixed pattern noise cannot be eliminated.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to the configuration of an amplified solid-state imaging device.

[Summary of the invention]

The present invention uses a current mirror circuit as an amplification element in the configuration of an amplification type solid-state imaging device, which is less susceptible to variations in the threshold voltage and amplification factor of the amplification FET, and is less susceptible to variations in the parasitic capacitance of the photodiode. The fixed pattern noise of the amplified solid-state imaging device has been reduced by taking into account the influence of the noise.

[Conventional technology]

The configuration of the conventional amplified solid-state imaging device is described in the Technical Report of the Television Society, published on Thursday, February 25, 1988, zDt8B.
An example of this is shown in FIG. 1 of ``IFPN analysis of 6r amplified solid-state imaging device AM engineering''. (?PN is an abbreviation for fixed pattern noise, hereinafter abbreviated as FPN.) In the above-mentioned literature, the following four items are listed as causes of IFPH.

1) Variation in the threshold voltage Vt of the amplification lFET 2) Variation in the amplification factor 9rn of the amplification IPET 3) Variation in the aperture ratio and parasitic capacitance of the photodiode 4) Variation in the dark current of the photodiode In the above literature, The cause of the deterioration of Il'PN is especially the above "1.
) Variation in threshold voltage Vt of amplification FET” and “
3) variations in the aperture ratio and parasitic capacitance of photodiodes.

[Problem to be solved by the invention]

However, the above-mentioned conventional technology has a problem in that it does not provide a means for suppressing FPN by using the internal structure of Mutsuko.

The present invention is intended to solve these problems, and its purpose is to create an amplification type solid-state in which the FPH does not deteriorate due to variations in the threshold voltage of the amplification IPET or variations in the parasitic capacitance of the photodiode. The company provides an imaging device.

[Means to solve the problem]

The amplified solid-state imaging device of the present invention has a series circuit in which a switch means controlled by time-series scanning pulses and a photodiode are connected in series, and one end of the series circuit is connected to a first common terminal. , the other end of the series circuit is connected to a reference current terminal of a current mirror circuit, and the common terminal of the current mirror circuit is connected to a second common terminal.

[Effect]

According to the above configuration of the present invention, since the signal charge qs accumulated in the photodiode flows through the switching means and the reference current terminal of the current mirror circuit, the current mirror
- A current according to the current ratio K of the circuit flows to the output terminal of the current mirror circuit.

From the above, the output signal charge qO is qO=qsX(1+K) Hail to you.

〔Example〕

FIG. 1 is a circuit diagram of an amplified solid-state imaging device according to an embodiment of the present invention, and FIG. 2 is a time chart showing its driving waveform.

01 to G6 are scanning pulses, which are applied in time series as shown in FIG. Furthermore, the scan pulses G1 to G6 may be waveforms obtained by directly applying the master output and slave output of the master-slave type shift register, as shown by the broken lines in FIG. Scanning Hals G1' to G6 are O
Turn on the V-bevel switch means.

Pixel 1 has a current mirror circuit 4. photodiode D,
Switch means T3. T4, switch means T3
．． The source electrode of T4 is connected to the voltage HpVBB through the first common terminal 2. The common terminal 6 of the current mirror circuit 4 is connected to the virtual ground through the second common terminal 3. It is connected to the inverting input terminal of the amplifier AMP. An integrator is constituted by an amplifier AMP, a capacitor C, and a switch S. When the signal R3T shown in FIG. 2 is 1, the switch S is turned on and the integrator is reset. Scanning pulse 01~G6
If the time when the signal becomes 0 level is 1=0, then the relationship between the video output voltage V and the video output current υ at T=t (T is smaller than the period of the reset signal R3T) is as follows, and the hail waveform is As shown in Figure 2. However, υ is the video output current flowing from terminal 3.

The pixels 1 can be arranged in a line or in an area, and if they are arranged in an area, it is necessary to provide a two-dimensional scanning circuit and pixel selection means. Switch means T3. T4 uses a P-type MOS transistor, and the switch means T
4 does not need to be provided by shorting the source electrode and the drain electrode. The current mirror circuit uses N-type MOS) transistors T1 and T2.
Connect the gate electrode and drain electrode of transistor T1 and the gate electrode of transistor T2 (N type MOS) to connect the reference current terminal and the N type M
The source electrodes of OS transistors 'I'1 and T2 are connected to a common terminal 6. The drain electrode of the N-type MOS transistor T2 is used as the output terminal 7. The current mirror circuit is a MO3) Langistau bipolar transistor, its operating polarity (PNP, NPN, N type, P
Any type of circuit connection may be used; for example, a Wilson type connection may be used.

Next, the operation of pixel 1 will be explained.

1) In the initial state, photodiode D is VD=VB
It is charged in the opposite direction to B-Vt. However, VBB is the power supply voltage, and Vt is the threshold voltage of the N-type MOS transistor.

2) Next, a current proportional to the amount of light irradiated onto photodiode D flows inside photodiode D, and the reverse voltage of photodiode D is reduced by ΔvO, Vo=VBB-
Vt-ΔvO.

5) Then switch means T3. When T4 is turned on by the scanning pulse, the photodiode D becomes VO(=VBB
−Vt). The potential difference to be recharged is Δ”
Since it is only vo, it is not affected by the threshold voltage Vt.

Due to the recharging current of the photodiode D flowing through the N-type MOS transistor T1, a current according to the current ratio K of the current mirror circuit flows through the N-type MOS transistor T2. From the above, the relationship between the output signal charge qO and the recharge charge qi of the photodiode D is qO''qsX(1-)-K), and an amplification operation is performed.

FIG. 3 is a circuit diagram showing an embodiment of the pixel 1 of the amplification type solid-state imaging device of the present invention, and FIG. 4 is a circuit diagram showing an equivalent circuit of the photodiode D.

In general, the current ratio of a current mirror circuit composed of MOS transistors is a function of the channel length and channel width of the MO3 transistor. Here, the drain current Wl of the MOS transistor T,...M'OS), the lyn transistor T,
Channel width L1...
channel length,...MO3) transistor T2
The drain current W2 of the transistor T is the channel width L2 of the MOS transistor T.

Also, an N-type MOS in which the gate electrode and the tunnel electrode are short-circuited
) The drain voltage versus drain current characteristics of the transistor T1 are shown in FIG. The drain voltage that becomes ≠0 based on the drain current is defined as the threshold direct voltage Vt.

In FIG. 6, Sl is a switch means controlled by a scanning pulse, and a power supply VDD supplies a drain voltage to an N-type MOS transistor T2.

In Figure 1, in order to eliminate the influence of leakage current at the time of cut-off of N-type MOS transistor T2 (the leakage current is multiplied by the number of pixels, the S/N deteriorates), two N-type MOS transistors are used. drain electrode and fiiV
A switch means was also provided between it and the DD. R'l is a load resistance.

In FIG. 4, a current source js is a photocurrent of the photodiode D, which is proportional to the amount of light irradiated to the photodiode D. The capacitor Oθ is the junction capacitance of the photodiode D, and a separate capacitor may be added. V
α is an anode electrode, and ■c is a cathode electrode.

The terminal voltage VD of the photodiode D at 1=0 is
(1=0 immediately after the switch means S1 is opened.) vn=vBB-vt (t=0) --- (
It is 1. The terminal voltage FEVD at the same (t: Ti is (
t=Tj) (2). Here, when the switch means S1 is turned on, the recharging current of the photodiode D flows, and VD=VBB-4
It is recharged until t. The recharge charge amount qs, which is the integral value of the recharge current, is:

From the above, the time 4 is also called the charge accumulation time, and is the time from when the switch means S1 is turned on until it is turned on again. Here, work 1. Engineering 2. The relationship of engineering V is engineering, +1. = engineering υ
...(4). Further, the output signal charge qo is expressed as an integral value of the video output current υ, qo=j υdt. As described above, in the amplification type solid-state imaging device of the present invention, 1) Variations in the threshold voltage Vt and amplification factor gm of the amplification FET 2) Variations in the parasitic capacitance of the photodiode The influence of the above variations is on the output signal charge qO It has the effect of making you feel uneasy.

FIG. 6 is a circuit diagram showing another embodiment of the present invention. The current mirror circuit is composed of NPN) transistors T5 and T6. The current ratio of a current mirror circuit using bipolar transistors is as follows. Here, A, the emitter area of 1 in a transistor is A,
. . . is the emitter area of the transistor T.

Further, the recharging voltage VD of the photodiode D is V D = 'VBB - VBEl. V
BEl is the base-emitter forward voltage of the transistor T, which is about 0.6 V in the case of silicon.

From the above, the output signal charge qO is becomes.

FIGS. 7 and 8 are circuit diagrams showing another embodiment of the present invention, which is an amplification type solid-state imaging device using a double gate type MO8) transistor. By configuring the transistor as a double gate type, the size of the transistor is reduced, and since the transistor only needs to have one polarity, the manufacturing method is simplified. In FIGS. 7 and 8, an and ap are scanning terminals, T7 . T8 is a P-channel double-gate type MO3) transistor, and T9 and T10 are N-channel double-gate type MOS transistors.

〔Effect of the invention〕

As described above, according to the present invention, the output signal charge is not affected by the threshold voltage or amplification factor gm of the amplifying IPET, and is not affected by the parasitic capacitance (lack) of the photodiode, so it is not affected by fixed pattern noise. It is possible to provide an amplified solid-state imaging device that is

The present invention is particularly effective in a contact image sensor having an optical system with equal magnification. This is because an amplifying solid-state imaging device of the same size as the original is required, so a large semiconductor device must be formed. For example, the short side of an A4-sized document is approximately 216 rras, and it is not easy to minimize variations in the parameters of the components of such a large semiconductor device. It is useful to process the signal by

Furthermore, development of thin film semiconductor devices has been active recently. The reliability of thin film semiconductor devices is inferior to that of single crystal semiconductor devices. Therefore, performing the amplification operation only when a pixel is selected as in the present invention is effective in constructing a highly reliable device.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the amplification type solid-state imaging device of the present invention. Figure 2 is the time chart of Figure 1. FIG. 3 is a circuit diagram showing one embodiment of a pixel. FIG. 4 is a circuit diagram showing a photodiode circuit. FIG. 5 is a characteristic diagram showing the threshold voltage Vt. FIG. 6 is a circuit diagram showing an embodiment of a pixel using bipolar transistors. 7 and 8 are circuit diagrams showing an embodiment of a pixel using a double-gate MOS transistor. G1 to G6...Scanning pulse 1...Pixel T5...Switch means D...Photodiode 2
.....First common terminal 4 .....Current mirror circuit 5 .....Reference current terminal 6 .....Common terminal 5 .....Second common Terminal 7...
...Output terminals Figure 2 Figure 6 Figure 7 Figure 8

Claims (1)

[Claims] In an amplified solid-state imaging device having one or more pixels 1 controlled by time-series scanning pulses G1 to G6,
It has a series circuit in which a switch means T3 controlled by time-series scanning pulses G1 to G6 and a photodiode D are connected in series, one end of the series circuit is connected to the first common terminal 2, and the series circuit is The other end is the current mirror circuit 4
An amplification type solid-state imaging device characterized in that a common terminal 6 of the current mirror circuit 4 is connected to a second common terminal 3.