JPS6160520U - - Google Patents
Info
- Publication number
- JPS6160520U JPS6160520U JP14555784U JP14555784U JPS6160520U JP S6160520 U JPS6160520 U JP S6160520U JP 14555784 U JP14555784 U JP 14555784U JP 14555784 U JP14555784 U JP 14555784U JP S6160520 U JPS6160520 U JP S6160520U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- pair
- transistors
- constant current
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Amplifiers (AREA)
Description
第1図は、本考案の一実施例を示す回路図、第
2図及び第3図は従来の差動増幅回路を示す回路
図である。
主な図番の説明、2…入力トランジスタ、3…
一方のトランジスタ、7…他方のトランジスタ、
11…定電流トランジスタ、12…電流源トラン
ジスタ、13…抵抗。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are circuit diagrams showing a conventional differential amplifier circuit. Explanation of main figure numbers, 2...Input transistor, 3...
One transistor, 7...the other transistor,
11... Constant current transistor, 12... Current source transistor, 13... Resistor.
Claims (1)
と該一対のトランジスタの共通エミツタに接続さ
れた電流源トランジスタとから成り、前記一対の
トランジスタの一方のベースに入力トランジスタ
を介して入力信号を印加して成る差動増幅回路に
おいて、ベースが前記電流源トランジスタと共通
接続され、エミツタが抵抗を介して電源に接続さ
れた定電流トランジスタを設け、該定電流トラン
ジスタの出力定電流を前記入力トランジスタのバ
イアス電流として使用することを特徴とする差動
増幅回路。 The difference is made up of a pair of transistors whose emitters are commonly connected, and a current source transistor connected to the common emitters of the pair of transistors, and an input signal is applied to the base of one of the pair of transistors via an input transistor. In the dynamic amplifier circuit, a constant current transistor is provided whose base is commonly connected to the current source transistor and whose emitter is connected to a power supply via a resistor, and the output constant current of the constant current transistor is used as the bias current of the input transistor. A differential amplifier circuit characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14555784U JPH0332096Y2 (en) | 1984-09-26 | 1984-09-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14555784U JPH0332096Y2 (en) | 1984-09-26 | 1984-09-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6160520U true JPS6160520U (en) | 1986-04-23 |
JPH0332096Y2 JPH0332096Y2 (en) | 1991-07-08 |
Family
ID=30703811
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14555784U Expired JPH0332096Y2 (en) | 1984-09-26 | 1984-09-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0332096Y2 (en) |
-
1984
- 1984-09-26 JP JP14555784U patent/JPH0332096Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH0332096Y2 (en) | 1991-07-08 |