JPS6160158A - デ−タ監視装置 - Google Patents

デ−タ監視装置

Info

Publication number
JPS6160158A
JPS6160158A JP59181954A JP18195484A JPS6160158A JP S6160158 A JPS6160158 A JP S6160158A JP 59181954 A JP59181954 A JP 59181954A JP 18195484 A JP18195484 A JP 18195484A JP S6160158 A JPS6160158 A JP S6160158A
Authority
JP
Japan
Prior art keywords
data
internal table
memory area
control device
data monitoring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59181954A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0370812B2 (enrdf_load_stackoverflow
Inventor
Masao Komatsu
小松 政夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59181954A priority Critical patent/JPS6160158A/ja
Publication of JPS6160158A publication Critical patent/JPS6160158A/ja
Publication of JPH0370812B2 publication Critical patent/JPH0370812B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Computer And Data Communications (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
JP59181954A 1984-08-31 1984-08-31 デ−タ監視装置 Granted JPS6160158A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59181954A JPS6160158A (ja) 1984-08-31 1984-08-31 デ−タ監視装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59181954A JPS6160158A (ja) 1984-08-31 1984-08-31 デ−タ監視装置

Publications (2)

Publication Number Publication Date
JPS6160158A true JPS6160158A (ja) 1986-03-27
JPH0370812B2 JPH0370812B2 (enrdf_load_stackoverflow) 1991-11-11

Family

ID=16109774

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59181954A Granted JPS6160158A (ja) 1984-08-31 1984-08-31 デ−タ監視装置

Country Status (1)

Country Link
JP (1) JPS6160158A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0370812B2 (enrdf_load_stackoverflow) 1991-11-11

Similar Documents

Publication Publication Date Title
US5068782A (en) Accessing control with predetermined priority based on a feedback arrangement
JPS6160158A (ja) デ−タ監視装置
JPH02128250A (ja) 情報処理装置のアクセス制御回路
JPH0254362A (ja) 並列処理コンピュータ
JPH01142955A (ja) 情報処理装置
JPH01183750A (ja) キャッシュメモリ常駐化方式
JP2543710B2 (ja) 入出力インタ−フェイス多重方式
JPH02287645A (ja) メモリ管理ユニット
JPH0711795B2 (ja) 入出力装置の二重化方式
JPS61267834A (ja) スタツク方式
JPS61193255A (ja) 高速中央処理装置の動作方法
JPH06348314A (ja) プログラマブルコントローラ
JPS63158660A (ja) マルチプロセツサバス制御方式
JPH03230393A (ja) 半導体記憶装置
JPS62257562A (ja) デ−タの入出力動作制御方式
JPS62164147A (ja) アドレス変換方式
JPH03156552A (ja) ダイレクトメモリアクセス制御回路方式
JPS6159564A (ja) 半導体集積回路
JPH01229350A (ja) 出力装置決定方式
JPH0341849B2 (enrdf_load_stackoverflow)
JPH02199556A (ja) ファイル装置のダンプ方式
JPH0797360B2 (ja) バス制御装置
JPH02284245A (ja) キャッシュメモリ制御方式
JPH08161253A (ja) Dma制御方法およびdma制御装置
JPS62298805A (ja) アナログ値入力装置