JPS6159556A - Information processor - Google Patents

Abstract

PURPOSE:To collect access frequency of each row of a table conversion buffer, i.e. hashing history data by a hash mechanism by installing the specified form counter to a table conversion buffer in an information processor. CONSTITUTION:The comparison of only the first row with a virtual address in an entry is executed in accordance with an algorithm against the row number hashed by a hash mechanism 1. A counter 3 adds to the content of the second entry corresponding to the row number hashed by one. When a table conversion buffer 2 is compose;d of plural columns, a column of the plural column is utilized as an accumulator, and the using frequency data of each row of the table conversion buffer 2 can be collected. A suitable hashing algorithm by the hash mechanism is obtained on the basis of the data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an information processing device equipped with a table translation buffer of a dynamic address translation mechanism.

[Prior art]

Conventionally, in information processing devices equipped with a dynamic address translation mechanism, in addition to table translation using segment tables and page tables, high-speed conversion from virtual addresses to real addresses is performed using a table translation buffer with a hash mechanism. It is a well-known fact that conversion takes place.

A device of this type is shown in FIG. In Figure 1, (1) assumes a virtual address as input.
There is a hashing machine 4 for C hashing, and (2) is a table conversion buffer having two entries, which is composed of a virtual address part (2a), a real address part (2b), etc. In the conventional device shown in FIG. 1, this table conversion buffer (the configuration of which is expressed by the number of rows and columns) has n rows and two columns.

Next, I will invent the operation.

The dynamic address translation mechanism that converts the virtual address i and the real address requires high speed, so it is equipped with a table translation buffer (2).The virtual address that requires translation is stored in the table by the hash mechanism (1). Conversion buffer (
2) is hashed using the number of rows n, and the corresponding row is determined. The virtual address in the virtual address field (2a) of the entry in the first and second columns of the corresponding row is compared with the virtual address that requires translation, and which of the first and second columns is When it is detected that there is an identical address in the above, the corresponding real address part (2b)
Extract the required real address from .

During this comparison, if no match is found, the required real address is determined by table conversion using a segment table and a page table (not shown). Next, the pair of virtual address and real address that required conversion is registered in the first or second column of the corresponding row according to a specified algorithm.

The conventional table conversion buffer array is structured as described above, so efficient use of the table conversion buffer is
It depended on how the hashing algorithm was used by the hashing mechanism. However, there is a problem in that it is not possible to easily obtain historical data of the hashing algorithm employed in such a hashing mechanism.

[Summary of the invention]

This invention was made to overcome the problems in conventional devices of this type, and by incorporating a predetermined format of color into the table conversion buffer, the access frequency of each row of the table conversion buffer can be improved. That is, it is an object of the present invention to provide an information processing device that can collect history data of nosing B using a hashing mechanism.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG.

The configuration of the table conversion buffer is expressed by the number of rows and columns, and although the present invention is effective in the case of multiple columns, the case of two columns will be explained here as an example.

In FIG. 2, the configurations of the push mechanism (1) and the table conversion buffer (2) are similar to those of the conventional one shown in FIG. And the virtual address is hashish machine m
For the row number hashed with c/), a comparison with the virtual address in the entry is performed using the same algorithm as before for only the first column. (The 3rd column is a counter for incrementing the contents of the entry in the second column corresponding to the row number hashed as described above.

As in the embodiment of this invention, when a table conversion buffer is composed of multiple columns, one of the columns is used as an accumulator to collect usage frequency data for each row of the table conversion buffer. can do. Based on this data, it is possible to optimize the hashing algorithm using the hashing mechanism.

Note that while the counter is operating and the required data is being collected, the hit rate of the data conversion buffer used will be poor; however, after the collected data is analyzed and the hash mechanism is reviewed as required In this case, all entries in the table conversion buffer can be used extremely effectively. In this case, the counter (3) can be used in any manner to combine the hash am (1) and the table translation buffer (2).
) is disconnected from the connection with the second column.

In the above embodiment, the number of columns in the table conversion buffer is exemplified as two, but it is not limited to this and may be three or more columns.

Further, in the above embodiment, the case of a table conversion buffer has been described, but a high speed buffer memory or other buffer may be used, and the same effects as in the above embodiment can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, since the plus l counter is connected to one predetermined column of the table conversion buffer consisting of multiple columns, there is no need for an extra external device, and the device can be made at low cost. Furthermore, by reflecting the analysis results of the hashing history data in the hashing algorithm of the hashing mechanism, there is an effect of improving the overall performance of the information processing device.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing a conventional table conversion buffer mechanism, and FIG. 2 is a schematic diagram showing an embodiment of the present invention. (1)...Hash mechanism, (table conversion buffer, (Core a)...virtual address section, (2b)...real address section, (3)...plus l counter. In addition, in the figure, the same Codes indicate the same or corresponding parts.

Claims (1)

[Claims] In an information processing device comprising a table conversion buffer that converts a virtual address into a real address, and a hash mechanism that inputs and hashes the virtual address to the table conversion buffer, a predetermined one of the table conversion buffer having a plurality of columns is provided. Use the column as an accumulator,
An information processing apparatus characterized in that a counting means is provided between the hash mechanism and the predetermined one column.