JPS6157704B2 - - Google Patents
Info
- Publication number
- JPS6157704B2 JPS6157704B2 JP54000505A JP50579A JPS6157704B2 JP S6157704 B2 JPS6157704 B2 JP S6157704B2 JP 54000505 A JP54000505 A JP 54000505A JP 50579 A JP50579 A JP 50579A JP S6157704 B2 JPS6157704 B2 JP S6157704B2
- Authority
- JP
- Japan
- Prior art keywords
- particles
- lid member
- semiconductor
- semiconductor chip
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 claims description 27
- 239000002245 particle Substances 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 claims description 7
- 238000007747 plating Methods 0.000 claims description 7
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 6
- 230000001070 adhesive effect Effects 0.000 description 6
- LBDSXVIYZYSRII-IGMARMGPSA-N alpha-particle Chemical compound [4He+2] LBDSXVIYZYSRII-IGMARMGPSA-N 0.000 description 4
- 230000007257 malfunction Effects 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052770 Uranium Inorganic materials 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000002285 radioactive effect Effects 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- JFALSRSLKYAFGM-UHFFFAOYSA-N uranium(0) Chemical compound [U] JFALSRSLKYAFGM-UHFFFAOYSA-N 0.000 description 2
- ZSLUVFAKFWKJRC-IGMARMGPSA-N 232Th Chemical compound [232Th] ZSLUVFAKFWKJRC-IGMARMGPSA-N 0.000 description 1
- 229910052776 Thorium Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Die Bonding (AREA)
- Electroplating Methods And Accessories (AREA)
- Junction Field-Effect Transistors (AREA)
Description
本発明は半導体装置に関し、特に半導体チツプ
用パツケージの構造に関する。
従来のこの種の半導体素子用パツケージは半導
体チツプを搭載するダイアタツチ部をする半導体
チツプ用パツケージにアルミナ、ベリリア等のセ
ラミツクから成る蓋部材をガラス、樹脂等の接着
剤で封止したものを用いている。
しかしながら、蓋部材として使用されているア
ルミナ、ベリリア等のセラミツクにはウラン、ト
リム等の放射性元素が含まれ、該放射性元素はα
粒子を放射している。従つて、前記パツケージに
実装された半導体チツプ用パツケージには、前記
蓋部材から放射されるα粒子が照射される。この
ため前記パツケージに実装された半導体チツプが
ダイナミツクRAM、CCD等の場合には該半導体
チツプが誤動作することがあつた。
たとえば、MOS・FETのゲート部に、α粒子
が照射されると、ホールとエレクトロンの対が出
来、このエレクトロンがゲートの下に電荷を生じ
させ、誤動作の原因となつていた。
本発明は、上述のような半導体チツプの誤動作
を防ぐためになされたものである。
すなわち本発明は、半導体素子用パツケージの
セラミツク蓋部材の半導体チツプに対向する内面
に、α粒子遮へい材として銅、ニツケル、金もし
くは銀のメツキ膜を付着したことを特徴とする半
導体装置である。
このようにメツキによる金属膜は純度が高くな
り、セラミツク蓋部材に比べα粒子の放射濃度が
低いものである。
一般にα粒子がある物質に照射された際、該α
粒子の飛程Ｒは次式で表わされる。
Ｒ＝1.03×10-4・Ｅ3/2・Ａ1/2／Ｐ
ここで、Ｐは〔ｇ／cm3〕で示した際のα粒子が
照射された物質の密度、Ｅはα粒子のエネルギ
〔Mev〕、Ａはα粒子が照射された物質の原子量で
ある。
ここでウラン、トリウム等から放射される典型
的なα粒子のエネルギが6Mevであることを考慮
して、上式から各種材料に照射されたα粒子の飛
程Ｒを計算すると第１表のようになる。
The present invention relates to semiconductor devices, and more particularly to the structure of a package for semiconductor chips. Conventional packages for semiconductor devices of this type include a package for semiconductor chips that serves as a die attach section on which a semiconductor chip is mounted, and a lid member made of ceramic such as alumina or beryllia and sealed with an adhesive such as glass or resin. There is. However, ceramics such as alumina and beryllia used as lid members contain radioactive elements such as uranium and trim, and these radioactive elements are α
It emits particles. Therefore, the semiconductor chip package mounted in the package is irradiated with the α particles emitted from the lid member. For this reason, when the semiconductor chip mounted on the package is a dynamic RAM, CCD, etc., the semiconductor chip may malfunction. For example, when the gate of a MOS/FET is irradiated with alpha particles, pairs of holes and electrons are created, and these electrons generate a charge under the gate, causing malfunction. The present invention has been made to prevent malfunctions of semiconductor chips as described above. That is, the present invention is a semiconductor device characterized in that a plating film of copper, nickel, gold, or silver is attached as an alpha particle shielding material to the inner surface of a ceramic lid member of a package for semiconductor elements facing the semiconductor chip. As described above, the plating metal film has a high purity and has a lower α particle radiation concentration than a ceramic lid member. Generally speaking, when α particles are irradiated onto a certain substance, the α
The range R of particles is expressed by the following formula. R=1.03×10 -4・E 3/2・A 1/2 /P Here, P is the density of the material irradiated with α particles in [g/cm 3 ], and E is the density of the α particles. Energy [Mev], A is the atomic weight of the substance irradiated with α particles. Considering that the energy of typical α particles emitted from uranium, thorium, etc. is 6 Mev, the range R of α particles irradiated to various materials is calculated from the above formula as shown in Table 1. become.
【表】
すなわち、6Mevのエネルギを有するα粒子は
第１表に示す飛程以上の厚さの各材料層により遮
へいすることができる。
このような材料層はメツキによつて成形でき
る。本発明では、蓋部材のアルミナ、ベリリア等
のセラミツク上に金属を焼結させ該焼結体上にメ
ツキをすることによつて得られる。
上述のように、半導体パツケージに適当な厚さ
の材料層を設けることにより、半導体チツプの能
動域に照射されるα粒子に基づく半導体チツプの
誤動作を防ぐことができる。
次に、本発明について図面を用いて説明する。
従来の半導体装置の断面図は第１図に示すように
半導体チツプ載置部１を有する絶縁基板２に半導
体チツプ３を金属ロー材、ガラス性接着剤等で接
着し、該半導体テツプ３と、外部リード４に接続
されている金属導体層５を金属細線６で接続した
後、セラミツクあるいは金属から成る蓋部材８を
ガラス性接着剤、樹脂接着剤、あるいは金属ロー
材等の接着剤７で封止したものであつた。このよ
うな構造では、蓋部材８から放射されるα粒子９
を阻止するものがなく、直接半導体チツプ３に当
つていた。これに対して、本発明による半導体装
置の一実施例は、第２図に示すように蓋部体１８
の裏部に、該蓋部材１８から放されるα粒子９を
遮へいするためのメツキ膜１９を設けたことであ
る。該α粒子遮へい膜１９はメツキにより形成さ
れる。[Table] That is, an α particle having an energy of 6 Mev can be shielded by each material layer having a thickness greater than the range shown in Table 1. Such a material layer can be formed by plating. In the present invention, it is obtained by sintering metal on ceramic such as alumina or beryllia of the lid member and plating the sintered body. As mentioned above, by providing a semiconductor package with a material layer of appropriate thickness, malfunction of the semiconductor chip due to alpha particles irradiating the active area of the semiconductor chip can be prevented. Next, the present invention will be explained using the drawings.
As shown in FIG. 1, a cross-sectional view of a conventional semiconductor device is such that a semiconductor chip 3 is bonded to an insulating substrate 2 having a semiconductor chip mounting portion 1 with a metal brazing material, a glass adhesive, etc. After connecting the metal conductor layer 5 connected to the external lead 4 with a thin metal wire 6, a lid member 8 made of ceramic or metal is sealed with an adhesive 7 such as glass adhesive, resin adhesive, or metal brazing material. It was something that stopped. In such a structure, α particles 9 emitted from the lid member 8
There was nothing to prevent it, and it hit semiconductor chip 3 directly. On the other hand, in one embodiment of the semiconductor device according to the present invention, as shown in FIG.
A plating film 19 is provided on the back side of the lid member 18 for shielding α particles 9 released from the lid member 18. The α particle shielding film 19 is formed by plating.
第１図は従来の半導体装置の断面図であり、第
２図は本発明による半導体装置の一実施例を示し
た断面図である。
なお、図において、１，１１……半導体素子載
置部、９……α粒子の飛程方向、２，１２……絶
縁基板、３，１３……半導体チツプ、４，１４…
…外部リード、５，１５……金属導体層、６，１
６……金属細線、７，１７……接着剤、８，１８
……蓋部材、１９……α粒子遮へい層を各々示
す。
FIG. 1 is a sectional view of a conventional semiconductor device, and FIG. 2 is a sectional view showing an embodiment of a semiconductor device according to the present invention. In the figure, 1, 11... semiconductor element mounting part, 9... alpha particle range direction, 2, 12... insulating substrate, 3, 13... semiconductor chip, 4, 14...
...External lead, 5,15...Metal conductor layer, 6,1
6...Thin metal wire, 7,17...Adhesive, 8,18
. . . Lid member, 19 . . . α particle shielding layer, respectively.
Claims (1)
の半導体チツプに対向する内面に、α粒子遮へい
材として銅、ニツケル、金もしくは銀のメツキ膜
を付着したことを特徴とする半導体装置。1. A semiconductor device characterized in that a plating film of copper, nickel, gold, or silver is adhered to the inner surface of a ceramic lid member of a semiconductor device package facing the semiconductor chip as an alpha particle shielding material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50579A JPS5593239A (en) | 1979-01-04 | 1979-01-04 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50579A JPS5593239A (en) | 1979-01-04 | 1979-01-04 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5593239A JPS5593239A (en) | 1980-07-15 |
| JPS6157704B2 true JPS6157704B2 (en) | 1986-12-08 |
Family
ID=11475615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50579A Granted JPS5593239A (en) | 1979-01-04 | 1979-01-04 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5593239A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6416718U (en) * | 1987-07-20 | 1989-01-27 |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5598846A (en) * | 1979-01-22 | 1980-07-28 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device |
| JPS5630745A (en) * | 1979-08-22 | 1981-03-27 | Fujitsu Ltd | Semiconductor device |
| US4975762A (en) * | 1981-06-11 | 1990-12-04 | General Electric Ceramics, Inc. | Alpha-particle-emitting ceramic composite cover |
| JPS5970347U (en) * | 1982-11-02 | 1984-05-12 | ティーディーケイ株式会社 | integrated circuit device |
| JPS61107119A (en) * | 1984-10-30 | 1986-05-26 | Hamamatsu Photonics Kk | Silicon photocell using ceramic container |
| JPS62281358A (en) * | 1986-05-29 | 1987-12-07 | Nec Kyushu Ltd | Semiconductor device |
| US4866498A (en) * | 1988-04-20 | 1989-09-12 | The United States Department Of Energy | Integrated circuit with dissipative layer for photogenerated carriers |
-
1979
- 1979-01-04 JP JP50579A patent/JPS5593239A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6416718U (en) * | 1987-07-20 | 1989-01-27 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5593239A (en) | 1980-07-15 |
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