JPS6156869B2 - - Google Patents

Info

Publication number
JPS6156869B2
JPS6156869B2 JP10427480A JP10427480A JPS6156869B2 JP S6156869 B2 JPS6156869 B2 JP S6156869B2 JP 10427480 A JP10427480 A JP 10427480A JP 10427480 A JP10427480 A JP 10427480A JP S6156869 B2 JPS6156869 B2 JP S6156869B2
Authority
JP
Japan
Prior art keywords
zirconium
layer
semiconductor substrate
wiring layer
polyimide resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP10427480A
Other languages
Japanese (ja)
Other versions
JPS5730334A (en
Inventor
Shinetsu Fujeda
Shuichi Suzuki
Naoyuki Kokuni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP10427480A priority Critical patent/JPS5730334A/en
Publication of JPS5730334A publication Critical patent/JPS5730334A/en
Publication of JPS6156869B2 publication Critical patent/JPS6156869B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Description

【発明の詳細な説明】 本発明は、半導体基板上に形成される配線層の
保護方法に関する。 一般にダイオード、トランジスタなどの半導体
素子は、外部雰囲気、例えば水分あるいは有害不
純物などの影響を受けて、いくつかの不都合な問
題を起すことがある。 その1つとして、半導体基板上に配設された配
線層(電極を含む)、例えばアルミニウム配線層
の腐蝕問題がある。特に、樹脂封止型半導体装置
では、一般に、封止用樹脂としてエポキシ樹脂が
用いられるが、該樹脂は吸水性であるため、アル
ミニウム配線層の腐蝕が完全には防止されない。 このため、従来、低温の化学気相成長法(アル
ミニウムの融点以下の温度)あるいはスパツタ法
によつて、アルミニウム配線層を二酸化ケイ素の
ような絶縁膜で被覆する手法が提案されている。
この場合、該絶縁膜を厚くすればするほど、アル
ミニウム配線層の腐蝕は抑制される。一般には、
2〜3μmの膜厚が必要とされている。しかしな
がら、化学気相成長法における二酸化ケイ素沈着
層は1〜1.5μm以上の膜厚になると該膜へのク
ラツク発生が増加し、またスパツタ法の場合に
は、絶縁膜の生成速度が小さいという欠点があつ
た。 また、他の方法としてアルミニウム配線層を耐
熱性のすぐれたポリイミド樹脂で被覆する手法が
知られている。この手法は、アルミニウム配線層
を配設した半導体基板上に、ポリイミド樹脂のプ
レポリマー溶液(例えば、商品名:PYER−
ML、製造元:Du Pont社)を回転塗布し、溶媒
成分を蒸発させた後、200〜350℃の温度で加熱し
て硬化被膜を形成するものである。 得られたポリイミド樹脂の被膜は、すぐれた電
気的特性(絶縁性)と耐熱性を備えているが、半
導体基板との密着性は必ずしも良好ではない。と
くに、高温・高湿の雰囲気下にあつては、半導体
基板との界面に水分などが侵入し易く、その結
果、アルミニウム電極部を含むアルミニウム配線
層が腐蝕し、半導体素子の特性が劣化するという
欠点があつた。このため、ポリイミド樹脂被膜の
形成時に、半導体基板上に、アルコキシシリル基
と、アミノ基もしくはエポキシ基を含む有機化合
物、または有機チタン化合物、または有機アルミ
ニウム化合物等の薄膜を介在させて、半導体基板
とポリイミド樹脂との密着性を高めることが試み
られているが、この場合も、高温・高湿雰囲気
(例えば、温度120℃、2気圧の飽和水蒸気)中に
あつては、密着性の低下を防止し得ず配線層への
保護効果は充分に得られてはいない。 そこで、本発明の目的は、高温・高湿下におい
ても樹脂被膜と配線層の高い密着性が保持され、
しかして配線層の腐蝕を効果的に防止することが
できる配線層の保護方法を提供することにある。 本発明者らは上記の目的を達成するために鋭意
研究を重ねた結果、半導体基板と樹脂被膜との間
にジルコニウム又は酸化ジルコニウムの層を介在
させることにより半導体基板と樹脂被膜間の密着
性が向上して、半導体基板上に形成されている配
線層の腐蝕が効果的に防止される事実を見出し、
本発明を完成するに到つた。 すなわち、本発明は、半導体基板上に形成され
る配線層の樹脂被膜による保護方法において、配
線層と樹脂被膜との間にジルコニウム又は酸化ジ
ルコニウム層を介在させることを特徴とする配線
層の保護方法である。 本発明の方法を実施するに際しては、保護すべ
き配線層が形成されている半導体基板の所定部分
にまずジルコニウム又は酸化ジルコニウム層を被
覆形成し、次いでジルコニウム又は酸化ジルコニ
ウムの層上に樹脂被膜を形成することが一般的で
ある。 半導体基板は、すでに半導体素子の形成、絶縁
膜の形成および配線層の形成した半導体基板であ
る。 ジルコニウム層を形成するには、真空蒸着法、
スパツタリング法等の方法を用いればよい。ま
た、酸化ジルコニウム層を形成するには、前記の
方法により形成したジルコニウム層を、スチーム
酸化法、ドライO2酸化法、ウエツトO2酸化法、
陽極化成法等の酸化法により酸化ジルコニウム層
に変換させる方法がある。また、例えばテトラキ
ス(アセチルアセトナト)ジルコニウム、モノブ
トキシトリス(アセチルアセトナト)ジルコニウ
ム、ジブトキシビス(アセチルアセトナト)ジル
コニウム、トリブトキシアセチルアセトナトジル
コニウム、テトラキス(エチルアセチルアセタ
ト)ジルコニウム、ブトキシトリス(エチルアセ
チルアセト)ジルコニウム、ブトキシビス(エチ
ルアセチルアセト)ジルコニウム、トリブトキシ
モノエチルアセチルアセトジルコニウム、テトラ
キス(エチルラクタト)ジルコニウム、ジブトキ
シビス(エチルラクトン)ジルコニウム、ビス
(アセチルアセトナト)ビス(エチルアセチルア
セトナト)ジルコニウム、モノアセチルアセトナ
トトリス(エチルアセチルアセトナト)ジルコニ
ウム、モノアセチルアセトナトビス(エチルアセ
チルアセトナト)ブトキシジルコニウム、ビス
(アセチルアセトナト)ビス(エチルラクトナ
ト)ジルコニウムなどの有機ジルコニウムキレー
ト化合物を適当な有機溶媒、例えばエチルアルコ
ール、イソプロピルアルコール、n−ブチルアル
コール、トルエン、キシレン等に溶解させ、得ら
れた溶液を配線を含む半導体基板面に塗布後、加
熱により酸化させて酸化ジルコニウム層となして
もよい。 上記ジルコニウム又は酸化ジルコニウムの層の
膜厚は10Å〜10000Å程度が好ましく、更には40
Å〜200Å程度が好ましい。 本発明に使用される樹脂としては、樹脂被膜の
電気絶縁性、耐熱性等の諸要素を考慮して、ポリ
イミド樹脂、ポリアミドイミド樹脂、ポリパラバ
ン酸樹脂、ポリヒダントイン樹脂、ポリベンツオ
キサゾール樹脂、ポリベンツイミダゾール樹脂等
が通常使用される。 実施例、比較例 第1図において、1は不純物拡散法などによつ
て所望の半導体素子を形成したシリコン基板であ
る。該シリコン基板1の表面に常用の熱酸化法に
よつて二酸化ケイ素被膜2を形成した。さらに、
その上には素子間を接続するアルミニウム配線層
3を形成した。 このようにして調製した半導体素子の表面を、
下記のように処理し、実施例1〜4、比較例a〜
dとした。 実施例1、2、比較例a、bの場合、表に示す
処理剤、溶媒、濃度の処理剤溶液を半導体基板上
に2000〜5000rpmの条件で回転塗布後、150〜350
℃で30分間加熱処理して酸化物層4(第1図)を
形成した。次に、酸化物層4の上に、ポリイミド
樹脂(商品名:PYER−ML、製造元:Du Pont
社)を回転塗布(3000rpm)し、150℃で1時
間、さらに350℃で1時間加熱処理して、ポリイ
ミド樹脂被膜5を形成した。 実施例3は、基板上に真空蒸着法によりジルコ
ニウム層を形成し、実施例4は、真空蒸着法によ
り形成したジルコニウム層を更にドライO2熱酸
化法により酸化して酸化ジルコニウム層を形成し
たほかは、実施例1と同様に処理してポリイミド
樹脂被膜を形成した。 比較例c、dは、半導体基板を、表1記載の処
理剤溶液に1分間浸漬し、水洗後150℃30分の加
熱処理を施した。後は、実施例1と同様に処理し
てポリイミド樹脂被膜を形成した。 以上のようにして得られた半導体装置の各試料
片を120℃、2気圧の飽和水蒸気雰囲気中に所定
時間放置した後、取り出して該試料片を1cm幅の
短柵状に切断した。各切断片について、半導体基
板とポリイミド樹脂膜間の接着強度をJISC−
6481の方法に従つて測定し、両者間の密着性を判
定した。その結果を第2図に示す。図中、1,
2,3,4はそれぞれ実施例1、2、3、4を、
a,b,c,dはそれぞれ比較例a、b、c、d
を表す。図より明らかなように、本発明のジルコ
ニウム酸化層又はジルコニウム層を介在させた試
料片は、接着強度の低下はみられず、半導体基板
とポリイミド樹脂被膜間の密着性が良好であるこ
とが確認された。 【表】
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for protecting a wiring layer formed on a semiconductor substrate. In general, semiconductor devices such as diodes and transistors are affected by the external atmosphere, such as moisture or harmful impurities, which can cause several problems. One such problem is corrosion of wiring layers (including electrodes) disposed on semiconductor substrates, such as aluminum wiring layers. In particular, in resin-sealed semiconductor devices, epoxy resin is generally used as the sealing resin, but since the resin is water-absorbing, corrosion of the aluminum wiring layer cannot be completely prevented. For this reason, conventional methods have been proposed in which the aluminum wiring layer is coated with an insulating film such as silicon dioxide by low-temperature chemical vapor deposition (at a temperature below the melting point of aluminum) or sputtering.
In this case, the thicker the insulating film is, the more corrosion of the aluminum wiring layer is suppressed. In general,
A film thickness of 2 to 3 μm is required. However, when the silicon dioxide deposited layer formed by the chemical vapor deposition method becomes thicker than 1 to 1.5 μm, the occurrence of cracks in the film increases, and in the case of the sputtering method, the formation rate of the insulating film is slow. It was hot. Another known method is to coat the aluminum wiring layer with a polyimide resin having excellent heat resistance. In this method, a prepolymer solution of polyimide resin (for example, product name: PYER-
ML (manufacturer: Du Pont) is spin-coated, the solvent component is evaporated, and then heated at a temperature of 200 to 350°C to form a cured film. The resulting polyimide resin coating has excellent electrical properties (insulating properties) and heat resistance, but its adhesion to the semiconductor substrate is not necessarily good. Particularly in high temperature and high humidity environments, moisture can easily enter the interface with the semiconductor substrate, resulting in corrosion of the aluminum wiring layer, including the aluminum electrode parts, and deterioration of the characteristics of the semiconductor element. There were flaws. Therefore, when forming a polyimide resin film, a thin film of an organic compound containing an alkoxysilyl group and an amino group or an epoxy group, an organic titanium compound, or an organic aluminum compound is interposed on the semiconductor substrate. Attempts have been made to improve the adhesion with polyimide resin, but even in this case, it is difficult to prevent the adhesion from decreasing in a high temperature and high humidity atmosphere (e.g. saturated steam at 120°C and 2 atm). Therefore, a sufficient protective effect on the wiring layer cannot be obtained. Therefore, the purpose of the present invention is to maintain high adhesion between the resin film and the wiring layer even under high temperature and high humidity conditions, and
Therefore, it is an object of the present invention to provide a method for protecting a wiring layer that can effectively prevent corrosion of the wiring layer. As a result of intensive research to achieve the above object, the inventors of the present invention have found that by interposing a layer of zirconium or zirconium oxide between the semiconductor substrate and the resin coating, the adhesion between the semiconductor substrate and the resin coating can be improved. discovered that corrosion of wiring layers formed on semiconductor substrates can be effectively prevented.
The present invention has now been completed. That is, the present invention provides a method for protecting a wiring layer formed on a semiconductor substrate using a resin coating, which is characterized in that a zirconium or zirconium oxide layer is interposed between the wiring layer and the resin coating. It is. When carrying out the method of the present invention, a zirconium or zirconium oxide layer is first formed on a predetermined portion of a semiconductor substrate on which a wiring layer to be protected is formed, and then a resin film is formed on the zirconium or zirconium oxide layer. It is common to do so. The semiconductor substrate is a semiconductor substrate on which a semiconductor element, an insulating film, and a wiring layer have already been formed. To form the zirconium layer, vacuum evaporation method,
A method such as a sputtering method may be used. In addition, in order to form the zirconium oxide layer, the zirconium layer formed by the above method may be oxidized using a steam oxidation method, a dry O 2 oxidation method, a wet O 2 oxidation method,
There is a method of converting it into a zirconium oxide layer by an oxidation method such as an anodization method. Also, for example, tetrakis(acetylacetonato)zirconium, monobutoxytris(acetylacetonato)zirconium, dibutoxybis(acetylacetonato)zirconium, tributoxyacetylacetonatozirconium, tetrakis(ethylacetylacetato)zirconium, butoxytris(ethylacetyl) aceto)zirconium, butoxybis(ethylacetylaceto)zirconium, tributoxymonoethylacetylacetozirconium, tetrakis(ethyllactato)zirconium, dibutoxybis(ethyllactone)zirconium, bis(acetylacetonato)bis(ethylacetylacetonato)zirconium, monoacetyl An organic zirconium chelate compound such as acetonatotris(ethylacetylacetonato)zirconium, monoacetylacetonatobis(ethylacetylacetonato)butoxyzirconium, bis(acetylacetonato)bis(ethyllactonato)zirconium, etc. in a suitable organic solvent, For example, it may be dissolved in ethyl alcohol, isopropyl alcohol, n-butyl alcohol, toluene, xylene, etc., the resulting solution may be applied to the surface of a semiconductor substrate including wiring, and then oxidized by heating to form a zirconium oxide layer. The thickness of the zirconium or zirconium oxide layer is preferably about 10 Å to 10,000 Å, more preferably about 40 Å.
The thickness is preferably about Å to 200 Å. The resins used in the present invention include polyimide resins, polyamideimide resins, polyparabanic acid resins, polyhydantoin resins, polybenzoxazole resins, and polybenzene resins, taking into consideration various factors such as electrical insulation and heat resistance of the resin coating. Imidazole resins and the like are commonly used. Examples and Comparative Examples In FIG. 1, 1 is a silicon substrate on which a desired semiconductor element is formed by an impurity diffusion method or the like. A silicon dioxide film 2 was formed on the surface of the silicon substrate 1 by a conventional thermal oxidation method. moreover,
An aluminum wiring layer 3 was formed thereon to connect the elements. The surface of the semiconductor device prepared in this way was
Processed as follows, Examples 1 to 4, Comparative Examples a to
It was set as d. In the case of Examples 1 and 2 and Comparative Examples a and b, after spin-coating a processing agent solution having the processing agent, solvent, and concentration shown in the table on the semiconductor substrate at 2000 to 5000 rpm,
An oxide layer 4 (FIG. 1) was formed by heat treatment at .degree. C. for 30 minutes. Next, on the oxide layer 4, polyimide resin (product name: PYER-ML, manufacturer: Du Pont
Co., Ltd.) was spin-coated (3000 rpm) and heat-treated at 150°C for 1 hour and then at 350°C for 1 hour to form a polyimide resin film 5. In Example 3, a zirconium layer was formed on the substrate by vacuum evaporation, and in Example 4, the zirconium layer formed by vacuum evaporation was further oxidized by dry O 2 thermal oxidation to form a zirconium oxide layer. was treated in the same manner as in Example 1 to form a polyimide resin film. In Comparative Examples c and d, the semiconductor substrates were immersed in the processing agent solution listed in Table 1 for 1 minute, washed with water, and then subjected to a heat treatment at 150° C. for 30 minutes. Thereafter, the same treatment as in Example 1 was carried out to form a polyimide resin film. Each sample piece of the semiconductor device obtained as described above was left in a saturated steam atmosphere at 120° C. and 2 atm for a predetermined period of time, and then taken out and cut into short fences with a width of 1 cm. For each cut piece, the adhesive strength between the semiconductor substrate and the polyimide resin film was measured by JISC-
The adhesion between the two was determined by measuring according to the method of 6481. The results are shown in FIG. In the figure, 1,
2, 3, and 4 are Examples 1, 2, 3, and 4, respectively;
a, b, c, d are comparative examples a, b, c, d, respectively
represents. As is clear from the figure, the sample piece with the zirconium oxide layer or zirconium layer of the present invention showed no decrease in adhesive strength, confirming that the adhesion between the semiconductor substrate and the polyimide resin coating was good. It was done. 【table】

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の方法によりジルコニウム酸
化層又はジルコニウム層を介在させた半導体装置
の概略断面図で、第2図は、上記半導体装置を
120℃、2気圧の飽和水蒸気雰囲気中に放置した
時の、半導体基板−ポリイミド樹脂膜間の接着強
度の時間的変化を示すものである。 1……シリコン基板、2……二酸化ケイ素被
膜、3……アルミニウム配線層、4……ジルコニ
ウム熱酸化層又はジルコニウム層、5……ポリイ
ミド樹脂被膜。
FIG. 1 is a schematic cross-sectional view of a semiconductor device in which a zirconium oxide layer or a zirconium layer is interposed by the method of the present invention, and FIG.
It shows the temporal change in adhesive strength between a semiconductor substrate and a polyimide resin film when the film was left in a saturated steam atmosphere at 120°C and 2 atm. 1...Silicon substrate, 2...Silicon dioxide coating, 3...Aluminum wiring layer, 4...Zirconium thermal oxidation layer or zirconium layer, 5...Polyimide resin coating.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板上に形成される配線層の樹脂被膜
による保護方法において、配線層と樹脂被膜との
間にジルコニウム又は酸化ジルコニウムの層を介
在させることを特徴とする配線層の保護方法。
1. A method for protecting a wiring layer formed on a semiconductor substrate by using a resin coating, the method comprising interposing a layer of zirconium or zirconium oxide between the wiring layer and the resin coating.
JP10427480A 1980-07-31 1980-07-31 Protection of wiring layer Granted JPS5730334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10427480A JPS5730334A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10427480A JPS5730334A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Publications (2)

Publication Number Publication Date
JPS5730334A JPS5730334A (en) 1982-02-18
JPS6156869B2 true JPS6156869B2 (en) 1986-12-04

Family

ID=14376338

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10427480A Granted JPS5730334A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Country Status (1)

Country Link
JP (1) JPS5730334A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4751349A (en) * 1986-10-16 1988-06-14 International Business Machines Corporation Zirconium as an adhesion material in a multi-layer metallic structure
JP2607505B2 (en) * 1987-02-27 1997-05-07 株式会社東芝 Digital phase synchronization controller
JPS6486715A (en) * 1987-09-29 1989-03-31 Toshiba Corp Automatic frequency control circuit

Also Published As

Publication number Publication date
JPS5730334A (en) 1982-02-18

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