JPS6156382A - Manufacture of thin film transistor display panel - Google Patents

Manufacture of thin film transistor display panel

Info

Publication number
JPS6156382A
JPS6156382A JP59179049A JP17904984A JPS6156382A JP S6156382 A JPS6156382 A JP S6156382A JP 59179049 A JP59179049 A JP 59179049A JP 17904984 A JP17904984 A JP 17904984A JP S6156382 A JPS6156382 A JP S6156382A
Authority
JP
Japan
Prior art keywords
electrode
thin film
display panel
film transistor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59179049A
Other languages
Japanese (ja)
Inventor
鈴木 光弥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP59179049A priority Critical patent/JPS6156382A/en
Publication of JPS6156382A publication Critical patent/JPS6156382A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は、薄膜トランジスター(以後TPTと記す)
表示パネルの欠陥修正方法に関する。
[Detailed Description of the Invention] (Industrial Application Field) This invention relates to a thin film transistor (hereinafter referred to as TPT).
The present invention relates to a method for correcting defects in display panels.

(従来技術) TPT )ランジスタアレイを平坦な基板上に、約数万
から10万個形成し、XY電極群に選択的に信号を送シ
、各画素を駆動させる、TPT表示パネルの開発が行わ
れている。第3図はこの種の表示パネルの縦断面図であ
υ、特にパネルのエツジ部を明示した。第5図21.2
2は透明な基板、23は表示用液晶層、24は、ゲート
電極、ゲート絶縁膜、半導体層、リース電極、ドレイン
電極からなるTPTであり、25は画素表示用透明電極
、26は外部駆動回路と接続するための引き出し電極、
27は液晶層ギャップ保持および液晶封入用シール材で
ある。
(Prior art) TPT display panels have been developed in which about tens of thousands to 100,000 transistor arrays are formed on a flat substrate, and signals are selectively sent to XY electrode groups to drive each pixel. It is being said. FIG. 3 is a longitudinal cross-sectional view of this type of display panel, particularly showing the edges of the panel. Figure 5 21.2
2 is a transparent substrate, 23 is a liquid crystal layer for display, 24 is a TPT consisting of a gate electrode, a gate insulating film, a semiconductor layer, a lease electrode, and a drain electrode, 25 is a transparent electrode for pixel display, and 26 is an external drive circuit. Extraction electrode for connecting with,
27 is a sealing material for maintaining the liquid crystal layer gap and for encapsulating the liquid crystal.

(発明が解決しようとする問題点) TFTアレイの製造方法は、透明基板上に、1000X
〜8000Xの薄膜全組、絶縁膜、半導体層などを薄膜
製造装置によって、4〜8層積み重ねる方法である。こ
のような方法での問題点は、数千Xの段差上に、導電性
金属例えばアルミニウムを数千X形成する場合、アルミ
ニウムの段切れが生じ、電気的接続がとれないために、
画素欠陥となることが多々発生する。また、第2の問題
点ば、金3、金属間の多層配線において、上下金属間で
電気的接続を行う場合、プロセス途中で大気との接触、
酸類などの薬液との接触によって、下側金属の表面に絶
縁性の酸化膜が形成され、そのために、上側金属と下側
金属との電気的接続が損なわれることがある。これは、
表示パネルのライン欠陥や、点欠陥となシ、TPT表示
パネルの製造歩留り低下の大きな原因である。
(Problems to be Solved by the Invention) A method for manufacturing a TFT array is to
This is a method in which all sets of thin films of ~8000X, insulating films, semiconductor layers, etc. are stacked in 4 to 8 layers using a thin film manufacturing apparatus. The problem with this method is that when a conductive metal, such as aluminum, is formed by several thousand degrees over a step of several thousand degrees, breaks in the aluminum occur, making it impossible to establish an electrical connection.
Pixel defects often occur. In addition, the second problem is that when electrical connections are made between upper and lower metals in multilayer wiring between metals, contact with the atmosphere during the process,
An insulating oxide film is formed on the surface of the lower metal due to contact with a chemical solution such as an acid, which may impair the electrical connection between the upper metal and the lower metal. this is,
Line defects and point defects in display panels are a major cause of decreased manufacturing yield of TPT display panels.

本発明は、上記の表示欠陥パネルの欠陥部分を修正し、
製造歩留9を向上させ、製造コストの大幅低下を目的と
する。
The present invention corrects the defective portion of the display defective panel described above,
The purpose is to improve manufacturing yield 9 and significantly reduce manufacturing costs.

(問題点を解決するだめの手段) 上記問題点を解決するために、導電性金属の段差被膜性
不良による段切れ部分、また、金属表面上の酸化膜によ
る金属間の導電性不良部分に、レーザー光線を照射して
、金属薄膜を局部的に溶解1.1    して導通不良
を回復するようにした。
(Means to Solve the Problem) In order to solve the above problem, it is necessary to apply a method to the step part due to poor step coating properties of the conductive metal, or to the part with poor conductivity between metals due to the oxide film on the metal surface. A laser beam was irradiated to locally melt the metal thin film to recover the conductivity failure.

(作 用) 本発明による電極の電気的接続不良部の修正方法は、T
FTアレイの製造プロセス途中で随時、他の画素部分に
悪影響をあたえないで実施できること。また、TFTア
レイを形成し、液晶注入後の完成品の動作試験時で始め
て発見された、電極間導通不良によるライン欠陥や、画
素の点欠陥についても、透明基板によって吸収されない
波長のレーザー光線を使って、金属間の導通不良を回復
することができる。そのだめに、製造歩留りが、大幅に
向上した。
(Function) The method for correcting a defective electrical connection of an electrode according to the present invention is as follows:
To be able to perform the process at any time during the FT array manufacturing process without adversely affecting other pixel parts. In addition, we are using laser beams with a wavelength that is not absorbed by the transparent substrate to eliminate line defects due to poor conductivity between electrodes and point defects in pixels, which were first discovered during operation tests of finished products after forming TFT arrays and injecting liquid crystals. This makes it possible to recover from conduction defects between metals. As a result, manufacturing yields have improved significantly.

(実施例) 次に本発明によるTPT表示パイ・ルの製造方法につい
て図面によって詳細に説明する。
(Example) Next, a method for manufacturing a TPT display pile according to the present invention will be explained in detail with reference to the drawings.

第1図は、本発明によるTPT表示パネルの製造方法、
とくに電極の段切れの修正方法について、TPTの縦断
面図を用いて概念的に示しだ図である。第1図、1は基
板、2はゲート電極であシ、スパッターになってクロム
を100OA形成した。
FIG. 1 shows a method for manufacturing a TPT display panel according to the present invention;
In particular, it is a diagram conceptually illustrating a method for correcting electrode breakage using a longitudinal cross-sectional view of a TPT. In FIG. 1, 1 is a substrate, 2 is a gate electrode, and 100 OA of chromium was formed by sputtering.

3はゲート酸化膜、4は半導体層であり、水素化   
 、!アモルファスシリコン、5は酸化膜であり、それ
ぞれプラズマCvDによって作成し、各層の膜厚−スミ
極、7はドレーン電極、9は画素用透明電極であり、ソ
ースとドレーン電極はアルミニウムをスパッターによっ
て600OA形成した。透明電極は工TO500A形成
した。8はn アモルファスシリコン層であシ、半導体
層4とアルミニウム電極6.7との電気的接続を得るた
めに形成した。ソース電極6は画素電極9と電気的に接
続していなければならないが、第1図では、半導体層と
酸化膜合計600OAの段差において、アルミニウムの
被膜性が悪く、段切れが発生している。したがってこの
部分は画素の点欠陥となる。これを修正するために、Y
AGレーザー発生機9によって、レーザー光を5〜10
μmのビームに絞シ、アルミニウムの断切れ部に照射し
た。この結果、断切れ部のアルミニウムは局部的に溶解
し、電気的に接続した。YAGレーザーのパワーは約1
0ワツト、照射時間は1秒以下で行うことにより、基板
や、半導体層の膜質は全く変化しない。
3 is a gate oxide film, 4 is a semiconductor layer, and hydrogenated
,! Amorphous silicon, 5 is an oxide film, each created by plasma CVD, the film thickness of each layer - Sumirode, 7 is a drain electrode, 9 is a transparent electrode for pixels, the source and drain electrodes are formed by sputtering aluminum to 600 OA did. The transparent electrode was formed using TO500A. Reference numeral 8 denotes an n amorphous silicon layer, which was formed to provide electrical connection between the semiconductor layer 4 and the aluminum electrode 6.7. The source electrode 6 must be electrically connected to the pixel electrode 9, but in FIG. 1, the aluminum coating is poor at the step between the semiconductor layer and the oxide film, which is a total of 600 OA, and breaks occur. Therefore, this portion becomes a pixel point defect. To fix this, Y
The AG laser generator 9 generates 5 to 10 laser beams.
A beam of μm was focused and irradiated onto the broken part of the aluminum. As a result, the aluminum at the disconnected portion was locally melted and electrically connected. The power of YAG laser is approximately 1
By performing the irradiation at 0 watts and for an irradiation time of 1 second or less, the film quality of the substrate and semiconductor layer does not change at all.

第2図は、本発明によるTPT表示パネルの製造方法の
一実施例を示し、外部回路との接続用電極引き出し部の
電極間の電気的接続方法を概念的に示した縦断面図であ
る。1は基板、2はゲート電極であり、クロム500A
をスパッターによって形成した。3はT11’T製造プ
ロセス途中で形成されたクロムの自然酸化膜を示し、き
わめて薄い。
FIG. 2 shows an embodiment of the method for manufacturing a TPT display panel according to the present invention, and is a vertical cross-sectional view conceptually showing a method for electrical connection between electrodes of an electrode lead-out portion for connection to an external circuit. 1 is the substrate, 2 is the gate electrode, and is made of chromium 500A.
was formed by sputtering. 3 shows a natural chromium oxide film formed during the T11'T manufacturing process, which is extremely thin.

11は外部回路との接続用ボンデングバットでありアリ
ミニラムをスパッターによって600OA形成した。1
3は外部回路接続用ワイヤー、12はボンディング部で
ある。クロムの自然酸化膜によって、ゲート電極2とパ
ッド電極11はオーミックコンタクトが得られていない
。これを基板の裏面からYAGレーザー発生機9によっ
てレーザービーム10を照射し、局部的にクロム電極を
溶解して自然酸化膜を破壊し、電気的な接続(オーミッ
クコンタクト)を得た。YAGレーザーの波長は約1μ
mであシ、さらにクロム′EI″L極の表面上でレーザ
ービーム径が最小となるように照射するだめ、透明基板
はほとんど加熱されず、クロム電極のみ加熱される。
Reference numeral 11 denotes a bonding bat for connection with an external circuit, and a 600 OA aluminium was formed by sputtering. 1
3 is a wire for external circuit connection, and 12 is a bonding part. Due to the natural chromium oxide film, ohmic contact is not obtained between the gate electrode 2 and the pad electrode 11. This was irradiated with a laser beam 10 from a YAG laser generator 9 from the back side of the substrate to locally melt the chromium electrode and destroy the natural oxide film, thereby obtaining an electrical connection (ohmic contact). The wavelength of YAG laser is approximately 1μ
Furthermore, since the laser beam is irradiated so that the diameter of the laser beam is minimized on the surface of the chromium ``EI'' L electrode, the transparent substrate is hardly heated, and only the chromium electrode is heated.

また、上記実施例では示さなかったが、レーザ−光源は
、YAGの他にHe−Neレーザー、炭酸ガスレーザー
等を使用することができる。また、表示パネルを組立て
後、液晶層を通してレーザー修正を行うことができるこ
とはもちろんである。
Further, although not shown in the above embodiments, a He-Ne laser, a carbon dioxide laser, etc. can be used as the laser light source in addition to YAG. Moreover, it is of course possible to perform laser correction through the liquid crystal layer after the display panel is assembled.

(発明の効果) 以上述べて全だように、本発明によるTPT表示パネル
の製造方法によれば、製造プロセス途中で、電極の段切
れなどの原因による接続不良が発生したときに、TFT
アレイの他の部分に悪影響をあたえないで、レーザー光
を照射することによって・修正回復ができること、また
、表示パネル完成後に発見された電気的接続不良による
表示画像の線欠陥を、パネルを分解することなく外部か
ら透明基板を通してレーザー光で修正することができる
ために、TPT表示パネルの製造歩留)が大幅に向上し
、そのためにコストダウンができると1.1    い
うすぐれた効果を有する。
(Effects of the Invention) As stated above, according to the method for manufacturing a TPT display panel according to the present invention, when a connection failure occurs due to a cause such as disconnection of an electrode during the manufacturing process, the TFT
It is possible to correct and recover by irradiating laser light without adversely affecting other parts of the array, and it is also possible to disassemble line defects in the display image due to poor electrical connections discovered after the display panel is completed. Since it is possible to perform correction with a laser beam from the outside through the transparent substrate without any trouble, the manufacturing yield of TPT display panels can be greatly improved, which has the excellent effect of reducing costs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明によるTPT表示パネルの製造方法を示
す一寅施例、第2図は本発明の一実施例、第5図は、T
PT表示パイ・ルの縦断面図である。 1・・・・・・基板       2・・・・・・ゲー
ト電極5・・・・・・ゲート絶縁膜   4・・・・・
・半導体膜5・・・・・・酸化膜      6・・・
・・・ンース電極7・・・・・・ドレイン電極    
8・・・・・・na−819・・・・・・レーザー発生
機  10・・・レーザービー11・・・ワイヤー  
      ム12・・・ボンド部     21・・
・下側透明基板22・・・上側透明基板   23・・
・液晶層24 ・・・ TPT 25・・・表示用透明15.極  26・・・引き出し
電極27・・・シール材 以   上
FIG. 1 is an example showing a method for manufacturing a TPT display panel according to the present invention, FIG. 2 is an example of the present invention, and FIG. 5 is a TPT display panel manufacturing method according to the present invention.
FIG. 3 is a vertical cross-sectional view of a PT display pile. 1...Substrate 2...Gate electrode 5...Gate insulating film 4...
・Semiconductor film 5...Oxide film 6...
... Source electrode 7 ... Drain electrode
8...na-819...Laser generator 10...Laserbee 11...Wire
Mu 12... Bond part 21...
・Lower transparent substrate 22...Upper transparent substrate 23...
・Liquid crystal layer 24...TPT 25...Transparent display 15. Pole 26... Extraction electrode 27... Seal material or more

Claims (1)

【特許請求の範囲】[Claims] 基板上に形成した薄膜トランジスター、該薄膜トランジ
スター駆動用電極、表示用電極、表示部などから成る薄
膜トランジスター表示パネルの製造方法において、前記
電極の電気的断線部にレーザー光線を照射し、局部的に
電極を溶解して電気的に接続することを特徴とする薄膜
トランジスター表示パネルの製造方法。
In a method for manufacturing a thin film transistor display panel comprising a thin film transistor formed on a substrate, an electrode for driving the thin film transistor, a display electrode, a display part, etc., a laser beam is irradiated onto an electrically disconnected part of the electrode to locally remove the electrode. A method for manufacturing a thin film transistor display panel, which comprises melting and electrically connecting the thin film transistor display panel.
JP59179049A 1984-08-28 1984-08-28 Manufacture of thin film transistor display panel Pending JPS6156382A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59179049A JPS6156382A (en) 1984-08-28 1984-08-28 Manufacture of thin film transistor display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59179049A JPS6156382A (en) 1984-08-28 1984-08-28 Manufacture of thin film transistor display panel

Publications (1)

Publication Number Publication Date
JPS6156382A true JPS6156382A (en) 1986-03-22

Family

ID=16059227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59179049A Pending JPS6156382A (en) 1984-08-28 1984-08-28 Manufacture of thin film transistor display panel

Country Status (1)

Country Link
JP (1) JPS6156382A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63183481A (en) * 1987-01-27 1988-07-28 三菱電機株式会社 Circuit board and repairs thereof
JPS63205638A (en) * 1987-02-20 1988-08-25 Mitsubishi Electric Corp Method for correcting defect of liquid crystal display
JPS63216091A (en) * 1987-03-04 1988-09-08 三菱電機株式会社 Matrix type display device
JPH03133135A (en) * 1989-10-19 1991-06-06 Nec Corp Connection of wiring of thin film integrated circuit
US5102361A (en) * 1989-01-23 1992-04-07 Sharp Kabushiki Kaisha Method for the manufacture of active matrix display apparatuses
JPH04229831A (en) * 1991-04-25 1992-08-19 Sanyo Electric Co Ltd Liquid crystal display panel
US5151807A (en) * 1989-01-31 1992-09-29 Sharp Kabushiki Kaisha Active matrix substrate and active matrix display apparatus
US5164851A (en) * 1990-02-05 1992-11-17 Sharp Kabushiki Kaisha Active matrix display device having spare switching elements connectable to divisional subpixel electrodes
JPH08114819A (en) * 1994-10-17 1996-05-07 G T C:Kk Active matrix liquid crystal display device
US7209193B2 (en) 1993-03-04 2007-04-24 Samsung Electronics Co., Ltd. Matrix-type display device capable of being repaired in pixel unit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581914A (en) * 1981-04-27 1983-01-07 池田 毅 Method of producing transparent pattern electrode
JPS59101693A (en) * 1982-12-02 1984-06-12 セイコーエプソン株式会社 Active matrix substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS581914A (en) * 1981-04-27 1983-01-07 池田 毅 Method of producing transparent pattern electrode
JPS59101693A (en) * 1982-12-02 1984-06-12 セイコーエプソン株式会社 Active matrix substrate

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63183481A (en) * 1987-01-27 1988-07-28 三菱電機株式会社 Circuit board and repairs thereof
JPS63205638A (en) * 1987-02-20 1988-08-25 Mitsubishi Electric Corp Method for correcting defect of liquid crystal display
JPS63216091A (en) * 1987-03-04 1988-09-08 三菱電機株式会社 Matrix type display device
US5102361A (en) * 1989-01-23 1992-04-07 Sharp Kabushiki Kaisha Method for the manufacture of active matrix display apparatuses
US5151807A (en) * 1989-01-31 1992-09-29 Sharp Kabushiki Kaisha Active matrix substrate and active matrix display apparatus
JPH03133135A (en) * 1989-10-19 1991-06-06 Nec Corp Connection of wiring of thin film integrated circuit
US5164851A (en) * 1990-02-05 1992-11-17 Sharp Kabushiki Kaisha Active matrix display device having spare switching elements connectable to divisional subpixel electrodes
JPH04229831A (en) * 1991-04-25 1992-08-19 Sanyo Electric Co Ltd Liquid crystal display panel
US7209193B2 (en) 1993-03-04 2007-04-24 Samsung Electronics Co., Ltd. Matrix-type display device capable of being repaired in pixel unit
JPH08114819A (en) * 1994-10-17 1996-05-07 G T C:Kk Active matrix liquid crystal display device

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