JPS6151928A - Etching device for semiconductor thin film - Google Patents

Etching device for semiconductor thin film

Info

Publication number
JPS6151928A
JPS6151928A JP17464884A JP17464884A JPS6151928A JP S6151928 A JPS6151928 A JP S6151928A JP 17464884 A JP17464884 A JP 17464884A JP 17464884 A JP17464884 A JP 17464884A JP S6151928 A JPS6151928 A JP S6151928A
Authority
JP
Japan
Prior art keywords
processing
bath
etching
solution
valve
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17464884A
Other languages
Japanese (ja)
Inventor
Yukinobu Tanno
丹野 幸悦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP17464884A priority Critical patent/JPS6151928A/en
Publication of JPS6151928A publication Critical patent/JPS6151928A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

Abstract

PURPOSE:To improve the LSI yield by reducing defects of the LSI under inhibition of the increase in throughput and in the amount of microparticles deposited on a wafer by a method wherein the processing solution is rapidly exhausted, filtered, circulated, and supplied after 1-batch processing. CONSTITUTION:The used solution of a required acid such as hydrofluoric acid passes from a supply bath 11 through a pressure pump 12 and is then supplied by split into etching baths 18 and 19 by operating valves 14 and 15 after passage through a filter 13. After etching finishing by processing the wafer in the bath 18, the solution of the bath 18 is rapidly exhausted to a reserve tank 22 through a valve 20. Thereafter, the solution is once accumulated in a storing bath 27 through a pump 23, filters 24 and 25, and a pump 26, and returned to the bath 18 by opening a valve 16 by utilizing a fall. During this operation, a next batch is etched in the bath 19, and the solution is rapidly exhausted to the reserve tank 22 by opening a valve 21 after processing, and is then returned to the bath 19 by opening a valve 17 after recirculation by the same operation. In order to actually increase the number of processing, the same processings should be performed repeatedly in succession with a majority of processing baths.

Description

【発明の詳細な説明】 (技術分野) 本発明は半導体基板上に形成されたN、膜(例えば酸化
膜、窒化膜、ポリシリコン)を湿式でエツチング加工す
る工程の装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to an apparatus for wet etching a nitrogen film (eg, oxide film, nitride film, polysilicon) formed on a semiconductor substrate.

(従来技術) 従来のCVD膜(Chemical、Vapor、De
posi−tion)又は熱酸化膜の湿式によるエツチ
ング槽ではそのエツチング液は主に酸類(フッ酸、リン
酸。
(Prior art) Conventional CVD film (Chemical, Vapor, De
In wet etching baths for thermal oxide films or thermal oxide films, the etching solution is mainly acids (hydrofluoric acid, phosphoric acid, etc.).

硝酸)であシ、ある処理数を越える毎に、処理液を交換
するか、又はオーバーフロー分を循環させて再使用して
いる。これが通常の使用方法である。
Each time a certain number of treatments is exceeded, the treatment solution is replaced or the overflow is recycled and reused. This is normal usage.

この方法は、薬液の費用の節約及び単位時間描シの処理
量を増大させるためである。エツチング液の交換頻度は
1〜2日に一回の割合である。しかしながら従来のエツ
チング法ではエツチングされた膜(ポリシソ、窒化膜、
酸化膜の残査)やそれに付随した異物がエツチング液中
に浮遊し、処理量が増す毎に浮遊粒子を増大して、エツ
チング完了した半導体基板にその粒子(残介)が再付着
するという欠点があった。この粒子はLSIのパターン
欠陥異常突起、異常拡散等が起り、歩留シ低下をもたら
す。特にICで重要なゲート酸化膜成長前のエツチング
処理工程等では粒子付着等は耐圧低下をもたらし重要な
問題となっている。
The purpose of this method is to save costs on chemical solutions and increase throughput per unit time. The frequency of replacing the etching solution is once every 1 to 2 days. However, with conventional etching methods, etched films (polysil, nitride, etc.
The drawback is that particles (residues of oxide film) and associated foreign matter float in the etching solution, and as the amount of processing increases, the number of floating particles increases, and the particles (residues) re-adhere to the semiconductor substrate after etching has been completed. was there. These particles cause pattern defects, abnormal protrusions, abnormal diffusion, etc. of the LSI, resulting in a decrease in yield. Particularly in the etching process before the growth of a gate oxide film, which is important for ICs, particle adhesion causes a drop in breakdown voltage and becomes an important problem.

(発明の目的) 本発明の目的は湿式によるエツチング工程における異物
粒子の付着の少いエツチング装置を提供することである
(Object of the Invention) An object of the present invention is to provide an etching apparatus in which less foreign particles are attached during a wet etching process.

(発明の構成) 本発明の構成は複数個の処理槽があシ、この処理液を急
速排出・濾過・循環して処理槽に再供給する機gを有す
る。又、複数の処理槽を順次繰9返し上記操作を行9も
のである。さらに処理槽に供給する新しい使用液は別系
統で描成沁れている。
(Configuration of the Invention) The configuration of the present invention includes a plurality of processing tanks, and a machine g for rapidly discharging, filtering, and circulating the processing liquid and re-supplying it to the processing tanks. In addition, the above operation is repeated 9 times in a plurality of processing tanks in sequence. Furthermore, the new liquid to be supplied to the treatment tank is prepared in a separate system.

(作用) 本発明のエツチング装置は半導体基板上に形成したCV
D膜又は熱酸化膜をエツチングする時一度基版から離脱
したCVD膜の残査(粒子)がエツチング液内で浮遊し
、半導体基板に再付着する問題を解決しようとするもの
である。これは一度バツナ処理した液を急速に排出する
ことにより、半導体基板に再付着する粒子を最小限にと
どめようとするものでちる。
(Function) The etching apparatus of the present invention etches CV formed on a semiconductor substrate.
This is intended to solve the problem that when etching a D film or a thermal oxide film, residues (particles) of the CVD film that have once separated from the substrate float in the etching solution and re-adhere to the semiconductor substrate. This is intended to minimize the number of particles that re-adhere to the semiconductor substrate by rapidly discharging the liquid that has been subjected to bathing treatment.

(発明の効果) 本発明の効果は1パツチ処理毎に排液・濾過するために
半導体基板に再付着する粒子を抑制することができLS
Iのパターン欠陥、異常突起、異常拡散等を低減するこ
とができLSIの歩留)の向上を達成することができる
(Effects of the Invention) The effects of the present invention are that particles re-adhering to the semiconductor substrate can be suppressed because the liquid is drained and filtered every time one patch is processed.
Pattern defects, abnormal protrusions, abnormal diffusion, etc. of I can be reduced, and an improvement in LSI yield can be achieved.

(実施例) まず、従来例のエツチング装置について模式図に従って
説明する。
(Example) First, a conventional etching apparatus will be described with reference to a schematic diagram.

第1図の1は使用処理液の供給槽でパルプ2を操作する
ことによシ処理槽3にエツチング液が流し込まれる。半
導体基板はウエノ・−キャリアに収容され、パンチ処理
でエツチングされる。この処理槽の液3はオーバーフロ
ーして4を通シ、5の加圧ポンプで濾過され恒温槽6を
通)フィルター7を通してライン8を経て処理槽3に戻
される。
1 in FIG. 1 is a supply tank for the processing solution used, and by operating the pulp 2, the etching solution is poured into the processing tank 3. The semiconductor substrate is placed in a wafer carrier and etched using a punch process. The liquid 3 in this processing tank overflows and is passed through 4, filtered by a pressure pump 5, passed through a constant temperature tank 6), passed through a filter 7, and returned to the processing tank 3 via a line 8.

この従来例の場合はオーバーフロー分の処理液を流すだ
けなので処理槽3内に浮遊している粒子が半導体基板表
面に付着する。
In this conventional example, since only an overflow amount of the processing liquid is flowed, particles floating in the processing tank 3 adhere to the surface of the semiconductor substrate.

例えば4インチ基板、25枚を1ノくツチとじてlOバ
ッチ処理後、水洗乾燥してレーザーによるゴミ検査器で
調べたところ0.5μm以上の粒子総数は103〜10
”74インチウェハでちった。
For example, 25 pieces of 4-inch substrates were tied together and processed in 1O batch, washed with water, dried, and examined with a laser dust detector. The total number of particles larger than 0.5 μm was 103 to 10.
``I used a 74-inch wafer.

次に本発明の実施例について説明する。Next, examples of the present invention will be described.

第2図において所要の酸(例えば7ツ酸)の使用液は供
給4’lllよシ12の加圧ポンプを通シフイルター1
3を通して14.15のパルプ操作でエツチング槽18
,19に分割供給される。今、槽18でウェハが処理さ
れエツチング終了後は槽18の液はパルプ20を通シ予
備タンク22に急速排液する。この後ポンプ23フイル
ター24゜25、ポンプ26を通シ、貯槽27に一時溜
める次に落差を利用してパルプ16を開にして4W18
に戻す。この操作中に次のバッチは槽19でエツチング
を行い、処理後パルプ21を開として予備タンク22に
急速排液する。後は、同操作で再循環してパルプ17を
開にして槽19に戻す。実際に処理数を増すには処理槽
を複数個以上にしてj[次間処理を繰シ返し行えばよい
In Fig. 2, the required acid (for example, 7-acid) is supplied to the filter 1 through a pressure pump 12.
Etching tank 18 with pulp operation of 14.15 through 3
, 19. Now, after the wafer is processed in the tank 18 and etching is completed, the liquid in the tank 18 is quickly drained into the reserve tank 22 through the pulp 20. After that, the pump 23, filter 24° 25, and pump 26 are passed through, and the pulp is temporarily stored in the storage tank 27. Next, the pulp 16 is opened using the head and the 4W18
Return to During this operation, the next batch is etched in tank 19, and after treatment pulp 21 is opened to quickly drain into reserve tank 22. Afterwards, the same operation is performed to recirculate the pulp 17 and return it to the tank 19. In fact, to increase the number of treatments, it is sufficient to use a plurality of treatment tanks or more and repeatedly perform the next treatment.

以上の様な本発明のエツチング処理槽で、4インチ基板
25枚を1バツチとして10パツチ(10キヤリア)処
理した後水洗・乾燥後、レーザーゴミ検査装置でウェハ
上に付着している0、 5μm以上の粒子数を調査した
ところ10〜1o 2 ? 74インチウェハと従来装
置で得られた値よりも〜1桁減少した。
After processing 10 patches (10 carriers) of 25 4-inch substrates in the etching bath of the present invention as described above, washing with water and drying, a laser dust inspection device detects particles of 0.5 μm attached to the wafers. When we investigated the number of particles above, it was 10 to 1o2? This is ~1 order of magnitude lower than the value obtained with a 74-inch wafer and conventional equipment.

従来装置と比較して本発明の装置による効果としてはL
SIの歩留シとして〜10%の向上が達成された。
Compared to the conventional device, the effect of the device of the present invention is L.
A ~10% improvement in SI yield was achieved.

(発明の説明のまとめ) 本発明は半導体基板上に形成されたCVD薄膜または熱
酸化膜の新規なエツチング装置を提供するものである。
(Summary of Description of the Invention) The present invention provides a novel etching apparatus for CVD thin films or thermal oxide films formed on semiconductor substrates.

要点は1バツチ処理後、処理液を急速排液・濾過・循環
・供給する方式にすることKよシ処理量増大と共にウェ
ハ上に付着する微小粒子の増加を抑11i11 してL
SIの欠陥を低減し、LSIの歩留逆向上に寄与できる
ものでおる。
The key point is to rapidly drain, filter, circulate, and supply the processing solution after one batch of processing.
This can reduce defects in SI and contribute to improving the yield of LSI.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のエツチング装置の概略図であシ、同図に
おいて、1は供給タンク、2はパルプ、3は処理槽、4
はオーバフローライン、5は加圧ポンプ、6は恒温槽、
7はフィルター、8はリターンラインである。 第2図は本発明の実施例のエツチング装置を示す概略図
であり、11は供給タンク、12はポンプ、13はフィ
ルター、14,15,16.17はパルプ、18.19
は処理槽、20.21はパルプ、22は貯液タンク、2
3はポンプ、24゜25はフィルター、26はポンプ、
27は貯液タンクである。 λL     1゜ 代理人 弁理士  内 原   ヨj  ・・  i/
/゛ \、−′ 第 i 面
FIG. 1 is a schematic diagram of a conventional etching apparatus, in which 1 is a supply tank, 2 is a pulp, 3 is a processing tank, and 4 is a schematic diagram of a conventional etching apparatus.
is an overflow line, 5 is a pressure pump, 6 is a constant temperature bath,
7 is a filter, and 8 is a return line. FIG. 2 is a schematic diagram showing an etching apparatus according to an embodiment of the present invention, 11 is a supply tank, 12 is a pump, 13 is a filter, 14, 15, 16.17 is pulp, 18.19
is a processing tank, 20.21 is pulp, 22 is a liquid storage tank, 2
3 is the pump, 24°25 is the filter, 26 is the pump,
27 is a liquid storage tank. λL 1゜Representative Patent Attorney Uchihara Yoj...i/
/゛\、−′ ゛       

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に形成された薄膜の湿式によるエッチング
加工工程における複数のエッチング槽を有する装置にお
いて、エッチング終了直後、該エッチング液を槽より急
速排液・濾過・循環してエッチング槽に戻し順次、複数
の槽を交互に切り換えてエッチングを行うことを特徴と
するエッチング装置。
In an apparatus having a plurality of etching tanks in a wet etching process of a thin film formed on a semiconductor substrate, immediately after etching is completed, the etching solution is rapidly drained from the tank, filtered, and circulated and returned to the etching tank. An etching device characterized in that etching is performed by alternately switching the baths.
JP17464884A 1984-08-22 1984-08-22 Etching device for semiconductor thin film Pending JPS6151928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17464884A JPS6151928A (en) 1984-08-22 1984-08-22 Etching device for semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17464884A JPS6151928A (en) 1984-08-22 1984-08-22 Etching device for semiconductor thin film

Publications (1)

Publication Number Publication Date
JPS6151928A true JPS6151928A (en) 1986-03-14

Family

ID=15982265

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17464884A Pending JPS6151928A (en) 1984-08-22 1984-08-22 Etching device for semiconductor thin film

Country Status (1)

Country Link
JP (1) JPS6151928A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6863019B2 (en) 2000-06-13 2005-03-08 Applied Materials, Inc. Semiconductor device fabrication chamber cleaning method and apparatus with recirculation of cleaning gas
JP2019220518A (en) * 2018-06-15 2019-12-26 東京エレクトロン株式会社 Substrate processing apparatus and processing solution reuse method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6863019B2 (en) 2000-06-13 2005-03-08 Applied Materials, Inc. Semiconductor device fabrication chamber cleaning method and apparatus with recirculation of cleaning gas
JP2019220518A (en) * 2018-06-15 2019-12-26 東京エレクトロン株式会社 Substrate processing apparatus and processing solution reuse method
US11430675B2 (en) 2018-06-15 2022-08-30 Tokyo Electron Limited Substrate processing apparatus and processing liquid reuse method

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