JPS6145837B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a refresh memory for a display device.

For example, when displaying alphabetic characters and numbers in a device that displays characters and symbols on a display screen, the total number of characters is 52 uppercase and lowercase alphabetic characters, and 10 numbers, for a total of 62 characters. To judge these 62 types of characters using binary information, 7 pieces of binary information are required.

On the other hand, when displaying kanji or graphic elements in addition to alphanumeric characters, for example, if there are 16 pieces of binary information, 2 ¹⁶ = 65536 characters and symbols can be identified.

The structure of the display device for displaying alphanumeric characters and the structure of the display device for displaying alphanumeric characters and various types of kanji will be described below with reference to the drawings.

FIG. 1 shows an apparatus for displaying alphanumeric characters that handles eight pieces of binary information, that is, information consisting of eight bits per word. 1 is an arithmetic processing unit (hereinafter referred to as CPU),
It is in charge of controlling calculations, transfers, etc. of information. 2 is a keyboard, which is used by the operator to input information from this device. Reference numeral 3 denotes an interface device, which is a device that controls passing information input from the keyboard 2 to the CPU 1.
4 is a refresh memory in which information to be displayed is stored. In the following explanation, information consisting of 8 bits per word will be treated as one unit. 5 is an information transmission line (hereinafter referred to as bus), which connects CPU1 and
Interface device 3 and refresh memory 4
It is a conduit for information between the two. 6 is memory
M1 constitutes the refresh memory 4, which in this example has a capacity of 8 bits x 1 words and stores the information to be displayed. 7 is memory M2
This is similar to memories M1 and M6. 8 is a character symbol generator CG1, and a refresh memory 4
A dot pattern as screen information such as characters and symbols corresponding to the information is stored. Reference numeral 9 denotes a display controller, which controls reading out information such as characters and symbols to be sequentially displayed from the refresh memory 4 and passing them to the character and symbols generator 1. A display screen 10 displays dot patterns of characters and symbols as screen information generated by the character and symbol generators 1 and 8.

FIG. 2 shows a device for displaying the alphanumeric characters, Kanji symbols, etc. that handles 16 pieces of binary information, that is, information consisting of 16 bits per word. The differences from the alphanumeric display device in FIG. The configuration is such that memory M1/6 and memory M2/7 are handled in parallel, and one information is (8+8) bits, one word is 16 bits, and character symbols are generated as a unit of information as a refresh memory of (8+8) bits x l word. It is passed from refresh memory 4 to generator CG18 and character/symbol generators CG2 and CG11.

As a result, a dot pattern corresponding to information of 16 bits per word is selected from the character symbol generator CG2.11 and displayed on the display device 10.

As mentioned above, it is necessary to configure the word structure to have a different number of bits as one unit of information in the refresh memory 4, depending on the type of characters and symbols displayed on the screen of the display device (alphanumeric characters and kanji in this case). There is.
For this reason, for example, it is not possible to display kanji by simply replacing the character symbol generator with a device that displays alphanumeric characters.

As mentioned above, since the word structure of the refresh memory must be changed, there is a drawback that it must be replaced with a refresh memory having the word structure as shown in FIG.

In this invention, it is possible to arbitrarily change the bit configuration of one word in the refresh memory 4 using a setting switch, etc., and by simply adding or removing a character symbol generator, different character symbols, etc. can be generated. This will be explained below based on the figure.

FIG. 3 is a diagram showing an embodiment of the present invention. In FIG. 3, the same reference numerals as in FIGS. 1 and 2 indicate the same or corresponding parts. 12 is a bit width selector, a refresh memory 4 and a character symbol generator.
It is located between CG1 and CG8 and character symbol generators CG2 and CG11.

The information to be displayed is input from the keyboard 2 and stored as information corresponding to the characters and symbols displayed from the bus 5 to the refresh memory 4 under the control of the CPU 1 via the interface device 3.

Here, a case will be explained in which the bit width of the bus 5 is 8 bits and the memories M1 and M6 and the memories M2 and 7 constitute one word with 8 bits. When using the character/symbol generator CG1/CG8, which uses 8 bits as one piece of information, the memories M1/6 and memories M2/7 are driven separately when display information is stored under the control of the CPU1.
They are also driven separately when information is extracted under the control of the display controller 9 and passed to the character symbol generators CG1 and CG8. That is, refresh memory 4 in this case
functions as an 8-bit×(l+l) word memory. This case corresponds to the configuration shown in FIG.

On the other hand, a character symbol generator that uses 16 bits as one information
When using CG2/8, memories M1/6 and memories M2/7 are driven separately when display information is stored under the control of CPU1, but information on 8 bits, half of the 16 bits, is The remaining 8 bits of information are stored in the memory M1.6 and the remaining 8 bits of information are stored in the memory M2.7. Furthermore, when information is retrieved under the control of the display controller 9, the memories M1 and 6 and the memories M2 and
7 is driven at the same time and the character symbol generator CG2/11
is passed as 16-bit information. That is, the refresh memory 4 in this case functions as a (8+8) bit×l word memory. This case corresponds to the configuration shown in FIG.

Next, the operation of the bit width selector 12 will be explained with reference to FIG. Here, to simplify the explanation, the memories M1.6 and the memories M2.7 are assumed to have a word structure of 2 bits per word. Furthermore, the case of a refresh memory where one piece of information consists of two bits and the case of a refresh memory where one piece of information consists of four bits will be explained.

A bit width setting switch 13 is used to set the number of bits for one piece of information in the refresh memory. 14 is a memory drive controller, which controls memory M1.
A0, A as address information of 6 and M2/7
A case where there are four pieces, 1, A2, and A3, will be explained. Refresh memory 4 under the control of CPU1
When the display information is stored in the refresh memory 4 and the word structure of the refresh memory 4 is 2 bits, the memory M1/6 or the memory M2/7 is selected by the address information A3 from the CPU 1, and the address information from the CPU 1 is Display information is stored in the address portion of each memory determined by information A0, A1, and A2. On the other hand, when the word structure of the refresh memory 4 is 4 bits, for example, the bit assumption switch 13 is closed.
The display information is divided into two bits each, and the memory is determined by the address information A0, A1, and A2.
They are stored in the same address section of M1/6 and memory M2/7. Next, when the display information in the refresh memory 4 is read out under the display controller 9, and the word structure of the refresh 4 is 2 bits, the display information is read out from the display address information A'3 from the display controller 9. When memory M1/6 or memory M2/7 is selected, display address information A'0,
Display information of the address portion of each memory determined by A'1 and A'2 is output.

On the other hand, when the word structure of the refresh memory 4 is 4 bits, the memories M1, 6 and M2, 7 are driven simultaneously, regardless of the address information A'3, and the address information A'0, A'1, A'2 is The display information of the address determined by is simultaneously output from each memory. 15 is an output information controller, a character symbol generator
If there are CG1 and CG8, that is, refresh memory 4
When the word structure is 2 bits, the output information of the individually driven memories M1.6 and M2.7 is passed to the character symbol generator CG1.8 as one information of 2 bits.

On the other hand, if there is a character symbol generator CG2/11,
That is, when the word structure of the refresh memory 4 is 4 bits, the output information of the memories M1, M6 and M2, 7, which are driven at the same time, is passed to the character symbol generator CG2, CG11 as one information of 4 bits.

Although the case of refresh has been described above, the present invention is not limited to this, and may be applied to a tag memory that stores attribute information such as the color and density of displayed characters and symbols. Furthermore, it may be used in a computer device that controls a storage device that is read and written by the CPU, such as a storage device that can have an 8-bit or 16-bit word structure via an 8-bit bus. .

As described above, in the display device according to the present invention, the character signal generator is selected by the bit width selector including the bit width setting switch, and the refresh memory 4
By changing the bit width, the same display device can easily display different types of display characters and symbols, or display different types of attributes of other types of display characters and symbols, and the hardware of the device can be changed. There are benefits to sharing.

[Brief explanation of the drawing]

Figure 1 shows the construction of a device that has a refresh memory with an 8-bit word structure and displays up to ²⁸ , that is, 256 types of characters and symbols such as alphanumeric characters, and Figure 2 shows a 16-bit word structure. FIG. ³ is a diagram showing the configuration of a display device according to an embodiment of the present invention. , FIG. 4 is a circuit diagram illustrating the bit width selector of FIG. 3. Note that 1 is an arithmetic processing unit, 2 is a first board, and 3 is an arithmetic processing unit.
is an interface device, 4 is a refresh memory,
5 is an information transfer line, 6 is a memory M1, 7 is a memory M2, 8 is a character symbol generator CG1, 9 is a display controller, 10 is a display screen, 11 is a character symbol generator
CG2 and 12 are bit width selectors, 13 is a bit width setting switch, 14 is a memory drive controller, and 15 is an output information controller. In the drawings, the same or corresponding parts are denoted by the same reference numerals.

Claims (1)

[Claims] 1. An arithmetic processing unit, an interface for inputting display information to the arithmetic processing unit, a refresh memory for storing the display information via the arithmetic processing unit, and reading out the display information in the refresh memory. A display comprising a display controller, a character symbol generator for converting the display information read by the display controller into character symbols, and a display screen for displaying the display information via the character symbol generator. In the apparatus, a bit width selector including a bit width setting switch is provided between the refresh memory, the character symbol generator, and the display controller, and a bit width selector including a bit width setting switch is provided between the refresh memory and the character symbol generator, respectively. It comprises a plurality of memories and a plurality of character symbol generators that are selectively driven by the bit width setting switch, and is capable of displaying different character symbols in accordance with the bit width of the display information. Characteristic display device.