JPS581782B2 - Moji pattern hatsuseiki - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement of a character generator having two high-speed processing memories and a low-speed processing memory in a kanji display device or printing device that displays kanji characters, hiragana characters, etc. in dot pattern characters.

In processing kanji display, the number of dots per character is larger than that of conventional alphabetic and numeric kana display, requiring approximately 4 to 16 times the memory capacity, and there are approximately 130 alphanumeric kana character types.
There are more than 50,000 types of kanji in total, and even if you consider only the ones that are actually processed, there are about 10,000 types.

When there are many character types like this, ROM (Read
If it is stored in ``Only Memory'' or frame memory, it will be extremely expensive.

Therefore, inexpensive disk or drum memory is used as memory, but it is slower than ROM or core memory.

To improve processing speed, some frequently used characters are stored in core memory or IC memory.

However, depending on the business content, there are various requirements, such as systems that require high-speed processing with a small number of character types, and systems that require many character types, even if low-speed processing is acceptable.

Naturally, if a device is developed or modified for each of these requirements, the cost will increase.

Therefore, the present invention is a method that satisfies the requirements with one device.

The purpose of this invention is to meet diversifying requirements such as systems that display over 10,000 types of kanji, or systems that process only several thousand types of limited characters at high speed, without making any modifications.
The object of the present invention is to provide a character generator that achieves this with one device.

The feature of this invention is that several character patterns and corresponding character code pairs and several character codes are stored in one memory, and character patterns corresponding to character code only data are stored in an external memory, The memory address for reading and referencing the character code is converted by passing it through an adder, and the corresponding character pattern is read from the external memory, and the number and character of the pair of character code and character pattern in the memory are converted. The reason is that the ratio of the number of codes can be set arbitrarily.

An example of the present invention is shown below.

Structure of Embodiment FIG. 1 shows a block diagram of a character generator which is an embodiment of the present invention.

The configuration and functions shown in FIG. 1 will be explained in (a) to (l) below.

(a) High-speed memory 9 A character pattern and character code conversion table is built in here in the format shown in FIG.

FIG. 2 will be explained.

In this embodiment, the character code is 16 bits, and the character pattern is 16 bits horizontally by 18 bits vertically, as shown in FIG.

Memory address 0 has character code A. 23 is stored, and the character pattern A.23 corresponding to the character code is stored at address 1. 22, the first and second rows are arranged in order, and the 18th row is located at the 19th address.

It is assumed that the next character code A is stored at address 20, followed by the corresponding character pattern A.

In other words, there is a character code A for every 19 addresses, and each character code A
The corresponding character pattern A is stored next to .

The character pattern A has a built-in negative number set in the character number setting register 17.

After that, the character code of other characters is B. 24 are written consecutively.

(b) External memory 16 FIG. 4 shows the external memory, which contains character patterns B. 2
6 are stored consecutively and their arrangement is in the same order as the character code B in the high speed memory.

(C) Constant 1 A constant=1 is set for latch 1 in FIG.

(d) Constant 2 A constant=19 is set for latch 2 in FIG.

(e) Number of characters setting register 17 The negative number of the character pattern stored in the high speed memory 9 can be set externally.

(f) Flip-flop 3 It is in a reset state in advance, and in the reset state, A. Select the output of the ND circuit 5, that is, the constant = 19,
In the set state, AND circuit 4, that is, constant=1 is selected.

The setting condition for the flip-flop 3 is when the contents of the character number setting register 17 and the contents of the read character number 18 match.

(g) Address register 8 Indicates the address of high speed memory 9, and is set to an initial value of 20.

(h) Reading character count counter 18 A counter that is incremented by 1 each time character code A and character code B built in the high-speed memory 9 are read.

Initial value=0. (i) Adder circuit 7 This adder circuit outputs the result of adding the contents of address register 8 and constant 1 (constant - 1) or constant 2 (constant = 19) selected by flip-flop 3, and then inputs the input of address register 8 again. connected to.

(j) Address register 15 This is a register for setting the address of the external memory 9.

(k) Character code register 10 Set the character code for reading the character pattern.

(l) Character pattern buffer register 14 This is a register for buffering character patterns to be displayed.

Operation of the Embodiment In FIG. 1, the character code to be displayed is set in the character code register 10.

In order to read out the character pattern corresponding to this character code, character code A or character code B stored in the high-speed memory 9 is read out.

First, address register 8 is set to address 0, and the contents of address O, that is, the first character code A, is read out and compared with the contents of character code register 10 in matching circuit 12.

If the results do not match, the second character code is read, and the address at that time is the constant 2 (constant = 19) selected by flip-flop 3 in the address register.
) and the sum added by the adder circuit 7, that is, the contents of address 19 are read out.

In this manner, the contents of address N+19, which is the current address N plus 19, are read one after another until the contents match the character code register 10.

If the character code A and the contents of the character code register 10 match, the character pattern A stored after the next address will be displayed.
is read, set in the character pattern buffer register 14, and displayed.

If the corresponding character code is not found and the character code A is read until the character number setting register 17 and read character number counter 18 match, the flip-flop 3 is set by the matching circuit 19.

As a result, the addend of the adder circuit 7 is constant 2 (constant - 1).
is selected.

As a result, the address of high-speed memory 9 is the current address N
Address 1 is added to address N+1.

That is, character codes B and 24 are read out at consecutive addresses.

The character code register 10 and the character code B are compared and if they match, the contents of the read character number counter 18 at that time are set in the address register 15 for the external memory 16.

That is, the character code B. 2
4 and character pattern B stored in external memory 16
．． 26 are arranged in the same order, so the contents of the read character count counter 18 are indirectly stored in the external memory 16.
This is the address of character pattern B built in.

Then, the corresponding character pattern B is read out from the external memory 16 and set in the character pattern buffer register 14 to display the character.

With the configuration as described above, the following effects can be obtained in the present invention.

By sharing the selected character pattern in the high-speed memory with the character code of other characters, the code is read out and referenced continuously, so it does not matter whether the character pattern is stored in the high-speed memory or external memory. You can convert character codes to character patterns without being aware of them.

As a result, it does not matter which one the character pattern is stored in, so if the negative number of the character pattern stored in the high-speed memory is set using software or a switch, it will be automatically processed.

That is, it is possible to freely change the distribution of character patterns and character codes stored in the high-speed memory, and it is possible to easily create a character generator suitable for the processing content.

For example, if the high-speed memory is a high-speed cycle memory and the external memory is a low-speed, large-capacity memory, the following systems 1 to 2 can be created.

■ Small character types, high-speed processing system If the number of characters used is small and limited, more character patterns can be stored in the high-speed memory.

As a result, there is no need to access external memory, allowing high-speed processing.

■ Multi-character type processing system When there are tens of thousands of characters, it would be extremely expensive to store the character patterns in expensive high-speed memory, so it is possible to store the character patterns in inexpensive, low-speed, large-capacity memory and use only character codes. is built into high-speed memory.

■ There are not so many intermediate system-used characters in Doki■ and ■, but if you want to perform high-speed processing to a certain extent, you can store patterns of frequently used characters in high-speed memory and patterns of characters that are used less frequently in external memory. By incorporating patterns in a well-balanced manner, a system with good cost performance is created.

As described above, it is possible to create a system appropriate for the business depending on the processing content without newly developing or modifying the device.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a character generator showing an embodiment of the present invention, FIG. 2 is a schematic diagram of the divided contents of the high-speed memory, and FIG. 3 is a diagram related to the character patterns built into the high-speed memory and the corresponding character codes. An explanatory diagram of one character, and Figure 4 is a schematic diagram of how the contents are divided into external memory. Explanation of signs, 1... constant (constant - 1), 2...
... Constant (constant = 19) 3 ... Flip-flop circuit, 4, 5 ... A. ND circuit, 6,1
3...OR circuit, 7...Addition circuit, 8
, 15...Address register, 9...
High-speed memory, 10...Character code register,
12.19... Matching circuit, 14... Character pattern buffer register, 16... External memory, 17... Character number setting register, 18.
...Reading counter, 20...Character display line, 21...High speed memory, 22...
・Character pattern A, 23...Character code A, 2
4...Character code B, 25...External memory, 26...Character pattern B0

Claims (1)

[Claims] 1. In a character pattern generator for converting a character code into a character pattern represented by a dot matrix and displaying or printing the character pattern, the first generator stores several pairs of character codes and character patterns and several other character codes. a second memory for storing character patterns corresponding to the other several character codes; a register for storing the number of pairs stored in the first memory; means for sequentially reading the address while updating the address by the capacity of the pair, and when the number of read characters reaches the value of the register, reading the first memory while updating the address by the capacity of the character code, and corresponding to the other character code. A character pattern generator characterized in that character patterns are sequentially read from a second memory and when the read character code matches a desired character code, a character pattern corresponding to the read character code is taken in.