JPS6143086A - Pll device - Google Patents

Abstract

PURPOSE:To eliminate a phase difference between a color burst and a chroma signal in terms of off-set by detecting directly the phase difference between the color burst and a clock pulse in a PCM video signal, and feeding back the result to an oscillator. CONSTITUTION:An A/D converter 43 quantizes a video signal 72 in the timing of a clock pulse 74 outputted from an oscillator 49, while a latch circuit 44 latches the output of the converter 43 by the pulse 74 to shape its waveform, and outputs a PCM video signal 73 to a terminal 57. On the other hand, the output of a latch circuit B53 is given to a latch circuit C56, which latches a PCM chroma signal 75 and obtains a PCM phase error 79. It is converted into an analog signal by a D/A converter 55. Then, when the phase and gain of a feedback loop is corrected by a loop filter 54 to feed back them to the oscillator 49, the output frequency of the oscillator 49 is so controlled that the error 79 can be minimized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application] The present invention relates to a PLL device for obtaining a clock signal of an integer multiple of a small carrier synchronized with a color burst of an electronic video signal.

E. Description of Prior Art] A conventional PLL device of this type is shown in FIG. 1, for example. The video signal 21 input from the input terminal 1' is passed through the buffer angle 2 to the low input i°-
A dance video signal 22 is obtained, this video signal 22 is passed through a bandpass filter 3 to obtain a chroma signal 23, and further a comparator 4.

is pulsed to obtain a black ff pulse 24.

Next, from this chroma pulse 24, the phase of the color I (-st) is stabilized, and any one cycle in the central part is gated.
5 to obtain an extraction sister torque of 2゛5. Then, the frequency (hereinafter Nfsc
) is the output of the oscillator 8 which oscillates the clock pulse 2
6 is frequency-divided by l/'N in a counter 9, the phase of the reproduced subcarrier 27 obtained is compared in a phase comparator 6, and the output error signal 28 is fed back to the oscillator 8 through a loop filter 7. and controls the clock pulse 260 frequency to synchronize the clock pulse 26 with the color burst.

The low-impedance video signal 22 obtained through the buffer amplifier 2 is input to the AD converter 10, the bandpass filter 3, and the sync separation circuit 12. In the sync separation circuit 12, a sync signal 29 is obtained, which generates a pulse. A delayed burst flag pulse 30 is generated in a circuit 13, and a shift gate circuit 5 extracts one cycle of the color burst near the center of the color burst using this burst flag pulse 30.

The AD converter IO quantizes the low-impedance video signal 22 using the clock pulse 26, and the latch circuit 11 latches this output using the clock pulse 26 to generate a PCM video signal 31. clock pulse 2
6 is phase-locked with the color burst separated from the video signal 22, so the PC that quantized the video signal 22
It is also phase locked to the color burst in the M video signal 31. Note that this is a 14.15Fi output terminal.

However, the delay time of the band-pass filter 3 generally drifts by about 2 nS/10°C unless special compensation is performed, and in the comparator 4, the chroma signal 23 and the reference voltage of the comparator 4 are affected by the temperature drift of the offset voltage and bias current. This causes a difference in the phase of the signal chroma pulse 24 after being pulsed! R, P
It is convenient for cinema that the start pulse 25 before the LL loop already has a phase change. Further, even if an attempt is made to adjust the phase of the color burst pulse 26 of the PCM video signal 31 at the output terminal 14, it is not possible to do so easily. This is true when multiple PCM video signals are combined into one by a switcher, and when a common color burst is inserted into a PCM video tape recorder that records several types of signals onto a single tape, a power 2-burst occurs. However, in the NTSC video signal, where the hue is directly determined by the phase difference between the color burst and the chroma signal, the change in hue after DA conversion may occur, for example, The human complexion sometimes appeared reddish or yellowish.

[Problems to be solved]

The present invention attempts to overcome the above-mentioned drawbacks of the conventional art by directly detecting the phase difference between a color burst and a clock pulse in a PCM video signal and feeding the result back to an oscillator.

(Means for Solving Problems) A PLL device according to the present invention includes means for quantizing an input video signal to obtain a PCM video signal, means for extracting a chroma signal from the PCM video signal, and a means for extracting a chroma signal from the PCM video signal. means for generating a clock pulse synchronized with the burst; means for counting down the clock pulse to create subcarriers; means for generating a pulse indicating the subcarrier, means for extracting the subcarrier by the pulse, means for detecting a phase difference between a color burst in the PCM chroma signal and an output of the means for extracting the subcarrier; The conventional problem is solved by synchronizing the color burst in the PCM video signal and the clock pulse. It is something to do.

L Example] Hereinafter, one embodiment of the present invention will be described based on FIG. 2.

Note that the frequency of the clock pulse is assumed to be four times the subcarrier frequency for ease of explanation.

In the figure, 42 is a buffer amplifier that converts the video signal 71 input through the input terminal 41 into a low impedance video signal 7.
Convert to 2. AD converter 43 and latch circuit A44
quantizes the video signal 72 and converts it into a PCM video signal 73
By means of obtaining
The latch circuit A44 performs waveform shaping using the clock pulse 74. shift register 45, adder A46,
The inverting attenuator 47 and the adder B48 are digital filters that have frequency characteristics that allow the chroma signal to pass through in a sine curve shape.
This is a means to extract 5. Oscillator 49 generates clock pulses 7 synchronized with color bursts in PCM video signal 73.
This is a means for generating a subcarrier 78 by counting down to a counter 50#-i clock pulse 74t1/4. The synchronization separation circuit 51 takes out the synchronization signal 76 from the video signal 72, and the pulse i main circuit 52 generates a pulse with a phase indicating the vicinity of the center of the color burst in the PCM video signal 73.

The latch circuit B53 not only latches the pulse using the subcarrier, but also extracts the edge of the subcarrier near the center of the color burst, and uses this extracted edge to transfer the PCM chroma signal 75 to the latch circuit C.
The signal is latched at 56 and the phase difference between both signals is detected.

The DA converter 55 converts the phase difference into an analog signal,
The loop filter 54 is for phase-locked loop correction;
This output is returned to oscillator 55. Note that 57 and 58 are output terminals.

A video signal 71 input from an input terminal 41 passes through a buffer amplifier 42 to become a low-impedance video signal 72, and is supplied to an AD converter 43 and a synchronous separation circuit 51. The A/D converter 43 quantizes the low impedance video signal 72 at the timing of a clock pulse 74 having a frequency a four times that of the subcarrier output from the oscillator 49, and the latch circuit A44 quantizes the video signal 72 with low impedance.
The output of 3 is latched with a clock pulse 74, shaped into a waveform, and sent from the output terminal 57.
5 and also to adder A46.

The shift register 45 shifts the PCM video signal 73 by two clocks to the adder B48, shifts it by four clocks, and outputs the result to the adder A46. If the PCM video signal 73 is expressed as sin vrt, adder A
Since #1sin wt is input to one side of 46, its output becomes Tsc: period of subcarrier. The output of adder A is equalized by an inverting attenuator 47.
The output of the adder B48 is Tsc 1 sin w(t--)−2cos W sub, sin
w (t-ri=(1-cosw"') ・sinw(t
-''-!l-), the filter becomes a filter that passes frequencies around the subcarrier frequency and attenuates other frequencies in a sine curve shape, as shown in FIG.

The synchronization separation circuit 51 selects the synchronization signal 7 from the video signal 72.
Further, the pulse generation circuit 52 delays the burst flag to the center of the color burst of the PCM video signal 73, and generates a pulse width 7 whose pulse width is about twice the period of the subcarrier. Sample pulse 77 is clock pulse 7 in latch circuit B53.
Since the output of the latch circuit B53 has information on the etch of the subcarrier 78, the output of the latch circuit B53 has information on the etch of the subcarrier 78. When the output of the latch circuit B53 latches the PCM chroma signal 75, which is the output of the adder B75, the output becomes a PCM phase error 79, which indicates the color burst and subcarrier phase error. PCM
If the phase error 79 is converted into an analog signal by the DA converter 55, and the feedback loose phase and gain are corrected by the loop filter 54 and fed back to the oscillator 49, the frequency of the output of the oscillator 49 will be such that the PCM phase error 79 is the minimum. Therefore, the color burst and the clock pulse 74 are phase-locked.

(Effects of the Invention) As described above, the present invention compares the phases of the color burst in the quantized video signal and the clock pulse, and since the filter and phase comparison are also digitalized,
This has the effect of providing a highly stable PLL device without disturbance due to external noise.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional PLL device that obtains a clock synchronized with the color burst of a quantized video signal, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. FIG. 2 is a frequency characteristic diagram of a digital filter used in an embodiment of the present invention. 43... AD converter 44... Latch circuit A 45... Shift register 49... Oscillator 50... Counter 51... Synchronization separation circuit 52... Pulse generation circuit 53... Latch circuit B 55...AD converter 56...Latch circuit C゛71.72...Video signal 73...PCM video signal 74...Clock pulse 75...PCM cross signal 76...Synchronization signal 78...・Subcarrier

Claims (1)

[Claims] means for quantizing an input video signal to obtain a PCM video signal; means for extracting a PCM chroma signal from the PCM video signal; means for generating a clock pulse synchronized with a color burst in the PCM video signal; means for counting down clock pulses to create subcarriers; means for separating a synchronization signal from the input video signal to generate a pulse indicating a phase near the center of a color burst in the PCM video signal; means for extracting a carrier; means for detecting a phase difference between the color burst in the PCM chroma signal and the output of the means for extracting the subcarrier; and DA converting the output of the means for detecting the phase difference to generate the clock pulse. PL consisting of a means of feeding back to the means of generating
L device.